Computer Engineering Publications Database (2000-2018) A-DELTA: A 64-bit High Speed, Compact, Hybrid Dynamic-CMOS/Threshold-Logic Adder 
| Publication Type | Conference Paper |
|---|---|
| Title | A-DELTA: A 64-bit High Speed, Compact, Hybrid Dynamic-CMOS/Threshold-Logic Adder |
| Author(s) | P. Celinski S.D. Cotofana D. Abbott |
| Publication Date | June 2003 |
| Conference Name | 7th International Work-Conference on Artificial and Natural Neural Networks |
| Period | 3-6 June 2003 |
| Location | Menorca, Spain |
| ISBN | 3-540-40210-1 |
| Page Numbers | |
| published | Published |
| Selected Publication | No |
| Note | |
| Topic(s) | None |
| Theme(s) | None |
| Project(s) | None |
| Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "P. Celinski and S.D. Cotofana and D. Abbott",
title = "A-DELTA: A 64-bit High Speed, Compact, Hybrid Dynamic-CMOS/Threshold-Logic Adder",
booktitle = "Proc. 7th International Work-Conference on Artificial and Natural Neural Networks",
address = "Menorca, Spain",
month = "June",
year = "2003",
pages = ""
}
author = "P. Celinski and S.D. Cotofana and D. Abbott",
title = "A-DELTA: A 64-bit High Speed, Compact, Hybrid Dynamic-CMOS/Threshold-Logic Adder",
booktitle = "Proc. 7th International Work-Conference on Artificial and Natural Neural Networks",
address = "Menorca, Spain",
month = "June",
year = "2003",
pages = ""
}