Publications

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Type Year Author Title
Displaying 1-25 of 1584 result(s).
J.J. Hoozemans, R.W. Heij, J. Van Straten, Z. Al-Ars, VLIW-based FPGA computational fabric with streaming memory hierarchy for medical imaging applications 1602_vliwbased_fpga_computational_fabric_with_streaming_memory.pdf (to appear: April 2017), 13th International Symposium on Applied Reconfigurable Computing (ARC2017), 3-7 April 2017, Delft, The Netherlands [Conference Paper]
A.A.C. Brandon, J.J. Hoozemans, J. Van Straten, S. Wong, Exploring ILP and TLP on a Polymorphic VLIW Processor 1603_exploring_ilp_and_tlp_on_a_polymorphic_vliw_processor.pdf (to appear: April 2017), 30th International Conference on Architecture of Computing Systems (ARCS2017), 3-6 April 2017, Vienna, Austria [Conference Paper]
N. Khammassi, I. Ashraf, X. Fu, C.G. Almudever, K.L.M. Bertels, QX: A High-Performance Quantum Computer Simulation Platform (to appear: March 2017), Design, Automation and Test in Europe (DATE 2017), 27-31 March 2017, Lausanne, Switzerland [Conference Proceedings]
C.G. Almudever, L. Lao, X. Fu, N. Khammassi, I. Ashraf, D. Iorga, S. Varsamopulos, C. Eichler, A. Wallraff, L. Geck, A. Kruth, J. Knoch, H. Bluhm, K.L.M. Bertels, The Engineering Challenges in Quantum Computing (to appear: March 2017), Design, Automation and Test in Europe (DATE 2017), 27-31 March 2017, Lausanne, Switzerland [Conference Proceedings]
J.J. Hoozemans, A. F Lorenzon, A.C.S. Beck, S. Wong, Improved dynamic cache sharing for communicating threads on a runtime-adaptable processor 1601_improved_dynamic_cache_sharing_for_communicating_threads_on.pdf (to appear: January 2017), 11th HiPEAC Workshop on Reconfigurable Computing (WRC2017), 23-1-2017, Stockholm, Sweden [Conference Paper]
E.J. Houtgast, V.M. Sima, G. Marchiori, K.L.M. Bertels, Z. Al-Ars, Power-Efficiency Analysis of Accelerated BWA-MEM Implementations on Heterogeneous Computing Platforms 1549_powerefficiency_analysis_of_accelerated_bwamem_implementa.pdf (to appear: December 2016), International Conference on Reconfigurable Computing and FPGAs (ReConFig 2016), 30 November - 2 December 2016, Cancun, Mexico , full paper [Conference Paper]
A. L. Sartor, A. F Lorenzon, L. Carro, F. Kastensmidt, S. Wong, A.C.S. Beck, Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW Processors 1598_exploiting_idle_hardware_to_provide_low_overhead_fault_tole.pdf (January 2017), ACM Journal on Emerging Technologies in Computing Systems (JETC), volume 13, issue 2 [Journal Paper]
M. Zandrahimi, A. Castillejo, P. Debaud, Z. Al-Ars, Industrial Approaches for Performance Evaluation Using On-Chip Monitors 1561_industrial_approaches_for_performance_evaluation_using_onc.pdf (December 2016), 11th IEEE International Design & Test Symposium (IDT 2016), 18-20 December 2016, Hammamet, Tunisia [Conference Paper]
S. Ren, K.L.M. Bertels, Z. Al-Ars, Exploration of Alternative GPU Implementations of the Pair-HMMs Forward Algorithm 1562_exploration_of_alternative_gpu_implementations_of_the_pair.pdf (December 2016), 3rd International Workshop on High Performance Computing on Bioinformatics (HPCB 2016), 15-18 December 2016, Shenzhen, China [Conference Paper]
J. Lee, F. Peper, S.D. Cotofana, M. Naruse, M. Ohtsu, T. Kawazoe, Y. Takahashi, T. Shimokawa, L. B. Kish, T. Kubota, Brownian Circuits: Designs 1563_brownian_circuits_designs.pdf (December 2016), International Journal of Unconventional Computing (IJUC), volume 12, issue 5-6 [Journal Paper]
G. Ch Sirakoulis, S. Hamdioui, Editorial Note on Memristor Models, Circuits and Architectures (December 2016), International Journal of Unconventional Computing (IJUC), volume 12, issue 4 [Journal Paper]
A. Scionti, S. Mazumdar, S. Di Carlo, S. Hamdioui, SIERRA - Simulation environment for memory redundancy algorithms (December 2016), Simulation Modelling Practice and Theory, volume 69 [Journal Paper]
J.W. Peltenburg, S. Ren, Z. Al-Ars, Maximizing Systolic Array Efficiency to Accelerate the PairHMM Forward Algorithm 1596_maximizing_systolic_array_efficiency_to_accelerate_the_pair.pdf (December 2016), IEEE International Conference on Bioinformatics and Biomedicine (BIBM 2016), 15-18 December 2016, Shenzhen, China [Conference Paper]
N. Ahmed, K.L.M. Bertels, Z. Al-Ars, A Comparison of Seed-and-Extend Techniques in Modern DNA Read Alignment Algorithms 1597_a_comparison_of_seedandextend_techniques_in_modern_dna_re.pdf (December 2016), Workshop on Accelerator-Enabled Algorithms and Applications in Bioinformatics (WACEBI 2016), 15 December 2016, Shenzhen, China [Conference Paper]
D.H.P. Kraak, I.O. Agbo, M. Taouil, S. Hamdioui, P Weckx, S. Cosemans, F. Catthoor, W Dehaene, On Mitigating Sense Amplifier Offset Voltage Degradation 1590_on_mitigating_sense_amplifier_offset_voltage_degradation.pdf (November 2016), First IEEE International Workshop on Automotive Reliability & Test (ART Workshop 2016), 17-18 November 2016, Fort Worth, USA [Conference Paper]
D. Iorga, R. Nane, Y. Lu, E van Dalen, K.L.M. Bertels, An Image Processing VLIW Architecture for Real-Time Depth Detection 1555_an_image_processing_vliw_architecture_for_realtime_depth_d.pdf (October 2016), 28th International Conference on Computer Architecture and High Performance Computing (SBAC-PAD 2016), 26-28 October 2016, Los Angeles, USA [Conference Paper]
R. Nane, V.M. Sima, C. Pilato, J. Choi, B Fort, A Canis, Y.T. Chen, H Hsiao, S Brown, F. Ferrandi, J Anderson, K.L.M. Bertels, A Survey and Evaluation of FPGA High-Level Synthesis Tools 1524_a_survey_and_evaluation_of_fpga_highlevel_synthesis_tools.pdf (October 2016), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 35, issue 10 [Journal Paper]
H.A. Du Nguyen, L. Xie, M. Taouil, S. Hamdioui, K.L.M. Bertels, CIM Architecture Communication Schemes (September 2016), The First International Workshop on In-Memory and In-Storage Computing with Emerging Technologies (IMISCET 2016), 11 September 2016, Haifa, Israel [Conference Paper]
T. T. Nguyen-Ly, T. Gupta, M. Pezzin, V. Savin, D. Declercq, S.D. Cotofana, Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units (September 2016), 19th Euromicro Conference on Digital Systems Design (DSD 2016), 31 August - 2 September, Limassol, Cyprus , 10.1109/DSD.2016.33 [Conference Paper]
P. Pouyan, S. Hamdioui, A. Rubio, RRAM Variability and Its Mitigation Schemes 1569_rram_variability_and_its_mitigation_schemes.pdf (September 2016), PATMOS & VARI 2016 (PATMOS & VARI 2016), 21-23 September 2016, Bremen, Germany , Best Paper Award [Conference Proceedings]
G.R. Voicu, S.D. Cotofana, High-performance, Cost-effective 3D Stacked Wide-Operand Adders 1545_highperformance_costeffective_3d_stacked_wideoperand_ad.pdf (August 2016), IEEE Transactions on Emerging Topics in Computing , DOI: 10.1109/TETC.2016.2598290 [Journal Paper]
C. Chen, Y. Fu, S.D. Cotofana, ”Towards Maximum Utilization of Remained Bandwidth in Defected NoC Links” (August 2016), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) , DOI: 10.1109/TCAD.2016.2570680 [Journal Paper]