Computer Engineering Publications Database (2000-2018) A full adder implementation using SET based linear threshold gates 
| Publication Type | Conference Paper |
|---|---|
| Title | A full adder implementation using SET based linear threshold gates |
| Author(s) | C.R. Lageweg S.D. Cotofana S. Vassiliadis |
| Publication Date | September 2002 |
| Conference Name | 9th IEEE International conference on electronics, circuits and systems |
| Period | 15-18 September 2002 |
| Location | Dubrovnik, Croatia |
| ISBN | 0-7803-7596-3 |
| Page Numbers | 665-669 |
| published | Published |
| Selected Publication | No |
| Note | |
| Topic(s) | None |
| Theme(s) | None |
| Project(s) | None |
| Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "C.R. Lageweg and S.D. Cotofana and S. Vassiliadis",
title = "A full adder implementation using SET based linear threshold gates",
booktitle = "Proc. 9th IEEE International conference on electronics, circuits and systems",
address = "Dubrovnik, Croatia",
month = "September",
year = "2002",
pages = "665-669"
}
author = "C.R. Lageweg and S.D. Cotofana and S. Vassiliadis",
title = "A full adder implementation using SET based linear threshold gates",
booktitle = "Proc. 9th IEEE International conference on electronics, circuits and systems",
address = "Dubrovnik, Croatia",
month = "September",
year = "2002",
pages = "665-669"
}