Computer Engineering Publications Database (2000-2018) Static buffered SET based logic gates 
| Publication Type | Conference Paper |
|---|---|
| Title | Static buffered SET based logic gates |
| Author(s) | C.R. Lageweg S.D. Cotofana S. Vassiliadis |
| Publication Date | August 2002 |
| Conference Name | 2nd IEEE Conference on Nanotechnology |
| Period | 26-28 August 2002 |
| Location | Washington DC, USA |
| ISBN | 0-7803-7538-6 |
| Page Numbers | 491-494 |
| published | Published |
| Selected Publication | No |
| Note | |
| Topic(s) | None |
| Theme(s) | None |
| Project(s) | None |
| Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "C.R. Lageweg and S.D. Cotofana and S. Vassiliadis",
title = "Static buffered SET based logic gates",
booktitle = "Proc. 2nd IEEE Conference on Nanotechnology",
address = "Washington DC, USA",
month = "August",
year = "2002",
pages = "491-494"
}
author = "C.R. Lageweg and S.D. Cotofana and S. Vassiliadis",
title = "Static buffered SET based logic gates",
booktitle = "Proc. 2nd IEEE Conference on Nanotechnology",
address = "Washington DC, USA",
month = "August",
year = "2002",
pages = "491-494"
}