Design of a Pipelined and Parameterized VLIW Processor: ρ-VEX v.2
Publication Type | Conference Paper |
---|---|
Title | Design of a Pipelined and Parameterized VLIW Processor: ρ-VEX v.2 |
Author(s) | R.A.E. Seedorf F. Anjam A.A.C. Brandon S. Wong |
Publication Date | January 2012 |
Conference Name | 6th HiPEAC Workshop on Reconfigurable Computing |
Period | 24 January 2012 |
Location | Paris, France |
ISBN | t.b.s. |
Page Numbers | 12 |
published | Published |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | Electronic System Level Design |
Project(s) | rVEX |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "R.A.E. Seedorf and F. Anjam and A.A.C. Brandon and S. Wong",
title = "Design of a Pipelined and Parameterized VLIW Processor: ρ-VEX v.2",
booktitle = "Proc. 6th HiPEAC Workshop on Reconfigurable Computing",
address = "Paris, France",
month = "January",
year = "2012",
pages = "12"
}
author = "R.A.E. Seedorf and F. Anjam and A.A.C. Brandon and S. Wong",
title = "Design of a Pipelined and Parameterized VLIW Processor: ρ-VEX v.2",
booktitle = "Proc. 6th HiPEAC Workshop on Reconfigurable Computing",
address = "Paris, France",
month = "January",
year = "2012",
pages = "12"
}