Test Cost Modeling for 3D-Stacked ICs
Publication Type | Conference Paper |
---|---|
Title | Test Cost Modeling for 3D-Stacked ICs |
Author(s) | M. Taouil S. Hamdioui E.J. Marinissen |
Publication Date | September 2011 |
Conference Name | Second IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits |
Period | 22-23 September 2011 |
Location | Anaheim, USA |
ISBN | t.b.s. |
Page Numbers | |
published | Published |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "M. Taouil and S. Hamdioui and E.J. Marinissen",
title = "Test Cost Modeling for 3D-Stacked ICs",
booktitle = "Proc. Second IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits",
address = "Anaheim, USA",
month = "September",
year = "2011",
pages = ""
}
author = "M. Taouil and S. Hamdioui and E.J. Marinissen",
title = "Test Cost Modeling for 3D-Stacked ICs",
booktitle = "Proc. Second IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits",
address = "Anaheim, USA",
month = "September",
year = "2011",
pages = ""
}