A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers 1511_a_dft_architecture_and_tool_flow_for_3d_sics_with_test_dat.pdf

Publication TypeJournal Paper
TitleA DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers
Author(s)C Papameletis
B. Keller
V. Chickermane
S. Hamdioui
E.J. Marinissen
Publication DateApril 2015
Journal NameIEEE Design & Test of Computers
Volume32
Issue4
Page Numbers40-48
ISSN0740-7475
publishedPublished
Selected PublicationYes
Note
Topic(s)Reliability
Theme(s)Dependable Nano Computing
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@article{,
author = "C Papameletis and B. Keller and V. Chickermane and S. Hamdioui and E.J. Marinissen",
title = "A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers",
journal = "IEEE Design & Test of Computers ",
volume = "32",
issue = "4",
month = "April",
year = "2015",
pages = "40-48 "
}