Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units

Publication TypeConference Paper
TitleFlexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units
Author(s)T. T. Nguyen-Ly
T. Gupta
M. Pezzin
V. Savin
D. Declercq
S.D. Cotofana
Publication DateSeptember 2016
Conference Name19th Euromicro Conference on Digital Systems Design
Period31 August - 2 September
LocationLimassol, Cyprus
ISBN978-1-5090-2817-7
Page Numbers
publishedPublished
Selected PublicationNo
Note10.1109/DSD.2016.33
Topic(s)None
Theme(s)Dependable Nano Computing
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@inproceedings{,
author = "T. T. Nguyen-Ly and T. Gupta and M. Pezzin and V. Savin and D. Declercq and S.D. Cotofana",
title = "Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units",
booktitle = "Proc. 19th Euromicro Conference on Digital Systems Design",
address = "Limassol, Cyprus",
month = "September",
year = "2016",
pages = ""
}