ρ-VEX on Chip: The Design of an ASIC for a Dynamically Reconfigurable VLIW Processor with 24-port Register File
Publication Type | Msc Thesis |
---|---|
Title | ρ-VEX on Chip: The Design of an ASIC for a Dynamically Reconfigurable VLIW Processor with 24-port Register File |
Author(s) | L. van Bremen |
Advisor(s) | S. Wong T.G.R.M. van Leuken Z. Al-Ars |
Publication Date | August 2017 |
CE Thesis Number | CE-MS-2017-08 |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | rVEX |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@mastersthesis{,
author = "L. van Bremen",
title = "ρ-VEX on Chip: The Design of an ASIC for a Dynamically Reconfigurable VLIW Processor with 24-port Register File",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "August",
year = "2017"
}
author = "L. van Bremen",
title = "ρ-VEX on Chip: The Design of an ASIC for a Dynamically Reconfigurable VLIW Processor with 24-port Register File",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "August",
year = "2017"
}