Computer Engineering Publications Database (2000-2018) On 3D Stacked IC Yield Improvement and 3D-DfT Test Architecture
| Publication Type | Msc Thesis |
|---|---|
| Title | On 3D Stacked IC Yield Improvement and 3D-DfT Test Architecture |
| Author(s) | J. Verbree |
| Advisor(s) | S. Hamdioui |
| Publication Date | July 2010 |
| CE Thesis Number | CE-MS-2010-XX |
| Selected Publication | No |
| Note | |
| Topic(s) | None |
| Theme(s) | None |
| Project(s) | None |
| Group(s) | Computer Engineering |
IEEE BibTex entry:
@mastersthesis{,
author = "J. Verbree",
title = "On 3D Stacked IC Yield Improvement and 3D-DfT Test Architecture",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "July",
year = "2010"
}
author = "J. Verbree",
title = "On 3D Stacked IC Yield Improvement and 3D-DfT Test Architecture",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "July",
year = "2010"
}