A structured and scalable test access architecture for TSV-based 3D stacked ICs
Publication Type | Conference Paper |
---|---|
Title | A structured and scalable test access architecture for TSV-based 3D stacked ICs |
Author(s) | E.J. Marinissen J. Verbree M. Konijnenburg |
Publication Date | April 2010 |
Conference Name | 28th IEEE VLSI Test Symposium |
Period | 19-22 April 2010 |
Location | Santa Cruz, USA |
ISBN | t.b.s. |
Page Numbers | 269-274 |
published | Published |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "E.J. Marinissen and J. Verbree and M. Konijnenburg",
title = "A structured and scalable test access architecture for TSV-based 3D stacked ICs",
booktitle = "Proc. 28th IEEE VLSI Test Symposium",
address = "Santa Cruz, USA",
month = "April",
year = "2010",
pages = "269-274"
}
author = "E.J. Marinissen and J. Verbree and M. Konijnenburg",
title = "A structured and scalable test access architecture for TSV-based 3D stacked ICs",
booktitle = "Proc. 28th IEEE VLSI Test Symposium",
address = "Santa Cruz, USA",
month = "April",
year = "2010",
pages = "269-274"
}