A Novel HDL Coding Style for Power Reduction in FPGAs 281_a_novel_hdl_coding_style_for_power_reduction_in_fpgas.pdf

Publication TypeTechnical Report
TitleA Novel HDL Coding Style for Power Reduction in FPGAs
Author(s)T. Marconi
D. Theodoropoulos
K.L.M. Bertels
G.N. Gaydadjiev
Publication DateJanuary 2010
Report NumberCE-TR-2010-02
Report NameTechnical Report, Computer Engineering Lab
Selected PublicationNo
Note
Topic(s)None
Theme(s)None
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@techreport{,
author = "T. Marconi and D. Theodoropoulos and K.L.M. Bertels and G.N. Gaydadjiev",
title = "A Novel HDL Coding Style for Power Reduction in FPGAs",
institution = "Delft University of Technology",
address = "Delft, Netherlands",
type = "Technical Report, Computer Engineering Lab",
number = "CE-TR-2010-02",
month = "January",
year = "2010"
}