Modeling reconfiguration in a FPGA with a hardwired network on chip 339_modeling_reconfiguration_in_a_fpga_with_a_hardwired_network.pdf

Publication TypeConference Paper
TitleModeling reconfiguration in a FPGA with a hardwired network on chip
Author(s)M.A. Wahlah
K.G.W. Goossens
Publication DateMay 2009
Conference Name16th Reconfigurable Architectures Workshop
Period25-26 May 2009
LocationRome, Italy
ISBN978-1-4244-3750-4
Page Numbers
publishedPublished
Selected PublicationNo
Note
Topic(s)None
Theme(s)None
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@inproceedings{,
author = "M.A. Wahlah and K.G.W. Goossens",
title = "Modeling reconfiguration in a FPGA with a hardwired network on chip",
booktitle = "Proc. 16th Reconfigurable Architectures Workshop",
address = "Rome, Italy",
month = "May",
year = "2009",
pages = ""
}