Assessing Fat-Tree Topologies for Regular Network-on-Chip Design under Nanoscale Technology Constraints
Publication Type | Conference Paper |
---|---|
Title | Assessing Fat-Tree Topologies for Regular Network-on-Chip Design under Nanoscale Technology Constraints |
Author(s) | D. Ludovici F. Gilabert S. Medardoni C.G. Requena M.E. Gómez P. López D. Bertozzi G.N. Gaydadjiev |
Publication Date | April 2009 |
Conference Name | Design, Automation and Test in Europe |
Period | 20-24 April 2009 |
Location | Nice, France |
ISBN | t.b.s. |
Page Numbers | 562-565 |
published | Published |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "D. Ludovici and F. Gilabert and S. Medardoni and C.G. Requena and M.E. Gómez and P. López and D. Bertozzi and G.N. Gaydadjiev",
title = "Assessing Fat-Tree Topologies for Regular Network-on-Chip Design under Nanoscale Technology Constraints",
booktitle = "Proc. Design, Automation and Test in Europe",
address = "Nice, France",
month = "April",
year = "2009",
pages = "562-565"
}
author = "D. Ludovici and F. Gilabert and S. Medardoni and C.G. Requena and M.E. Gómez and P. López and D. Bertozzi and G.N. Gaydadjiev",
title = "Assessing Fat-Tree Topologies for Regular Network-on-Chip Design under Nanoscale Technology Constraints",
booktitle = "Proc. Design, Automation and Test in Europe",
address = "Nice, France",
month = "April",
year = "2009",
pages = "562-565"
}