Automation of wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism in a chip
Publication Type | Msc Thesis |
---|---|
Title | Automation of wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism in a chip |
Author(s) | A.J. van den Berg |
Advisor(s) | K.G.W. Goossens G.N. Gaydadjiev |
Publication Date | November 2007 |
CE Thesis Number | CE-MS-2007-14 |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@mastersthesis{,
author = "A.J. van den Berg",
title = "Automation of wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism in a chip",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "November",
year = "2007"
}
author = "A.J. van den Berg",
title = "Automation of wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism in a chip",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "November",
year = "2007"
}