Translation of SystemC to Synthezisable VHDL
Publication Type | Msc Thesis |
---|---|
Title | Translation of SystemC to Synthezisable VHDL |
Author(s) | E.P.M. van Diggele |
Advisor(s) | S. Wong |
Publication Date | July 2006 |
CE Thesis Number | CE-MS-2006-06 |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@mastersthesis{,
author = "E.P.M. van Diggele",
title = "Translation of SystemC to Synthezisable VHDL",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "July",
year = "2006"
}
author = "E.P.M. van Diggele",
title = "Translation of SystemC to Synthezisable VHDL",
school = "Delft University of Technology",
address = "Delft, Netherlands",
month = "July",
year = "2006"
}