64-bit Floating-Point FPGA Matrix Multiplication 858_64bit_floatingpoint_fpga_matrix_multiplication.pdf

Publication TypeConference Paper
Title64-bit Floating-Point FPGA Matrix Multiplication
Author(s)Y. Dou
S. Vassiliadis
G.K. Kuzmanov
G.N. Gaydadjiev
Publication DateFebruary 2005
Conference Name13th International Symposium on Field Programmable Gate Arrays
Period20-22 February 2005
LocationMonterey, USA
ISBN1-59593-029-9
Page Numbers86-95
publishedPublished
Selected PublicationNo
Note
Topic(s)None
Theme(s)None
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@inproceedings{,
author = "Y. Dou and S. Vassiliadis and G.K. Kuzmanov and G.N. Gaydadjiev",
title = "64-bit Floating-Point FPGA Matrix Multiplication",
booktitle = "Proc. 13th International Symposium on Field Programmable Gate Arrays",
address = "Monterey, USA",
month = "February",
year = "2005",
pages = "86-95"
}