Computer Engineering Publications Database (2000-2018) Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach 
| Publication Type | Conference Paper |
|---|---|
| Title | Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach |
| Author(s) | P. Celinski S.F. Al-Sarawi D. Abbott S.D. Cotofana S. Vassiliadis |
| Publication Date | February 2004 |
| Conference Name | IEEE Computer Society Annual Symposium on VLSI |
| Period | 19-20 February 2004 |
| Location | Lafayette, USA |
| ISBN | 0-7695-2097-9 |
| Page Numbers | 127-132 |
| published | Published |
| Selected Publication | No |
| Note | |
| Topic(s) | None |
| Theme(s) | None |
| Project(s) | None |
| Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "P. Celinski and S.F. Al-Sarawi and D. Abbott and S.D. Cotofana and S. Vassiliadis",
title = "Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach",
booktitle = "Proc. IEEE Computer Society Annual Symposium on VLSI",
address = "Lafayette, USA",
month = "February",
year = "2004",
pages = "127-132"
}
author = "P. Celinski and S.F. Al-Sarawi and D. Abbott and S.D. Cotofana and S. Vassiliadis",
title = "Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach",
booktitle = "Proc. IEEE Computer Society Annual Symposium on VLSI",
address = "Lafayette, USA",
month = "February",
year = "2004",
pages = "127-132"
}