Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation
Publication Type | Conference Paper |
---|---|
Title | Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation |
Author(s) | Z. Al-Ars A.J. van de Goor J. Braun D. Richter |
Publication Date | March 2003 |
Conference Name | Design, Automation and Test in Europe Conference and Exposition |
Period | 3-7 March 2003 |
Location | Munich, Germany |
ISBN | 0-7695-1870-2 |
Page Numbers | 484-489 |
published | Published |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "Z. Al-Ars and A.J. van de Goor and J. Braun and D. Richter",
title = "Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation",
booktitle = "Proc. Design, Automation and Test in Europe Conference and Exposition",
address = "Munich, Germany",
month = "March",
year = "2003",
pages = "484-489"
}
author = "Z. Al-Ars and A.J. van de Goor and J. Braun and D. Richter",
title = "Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation",
booktitle = "Proc. Design, Automation and Test in Europe Conference and Exposition",
address = "Munich, Germany",
month = "March",
year = "2003",
pages = "484-489"
}