Computer Engineering Publications Database (2000-2018) On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs 
| Publication Type | Conference Paper |
|---|---|
| Title | On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs |
| Author(s) | M. Taouil S. Hamdioui |
| Publication Date | May 2012 |
| Conference Name | 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era |
| Period | 16-18 May 2012 |
| Location | Tunis, Tunisia |
| ISBN | t.b.s. |
| Page Numbers | |
| published | Published |
| Selected Publication | No |
| Note | |
| Topic(s) | None |
| Theme(s) | None |
| Project(s) | None |
| Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "M. Taouil and S. Hamdioui",
title = "On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs",
booktitle = "Proc. 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era",
address = "Tunis, Tunisia",
month = "May",
year = "2012",
pages = ""
}
author = "M. Taouil and S. Hamdioui",
title = "On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs",
booktitle = "Proc. 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era",
address = "Tunis, Tunisia",
month = "May",
year = "2012",
pages = ""
}