Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor 144_simultaneous_reconfiguration_of_issuewidth_and_instruction.pdf

Publication TypeConference Paper
TitleSimultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor
Author(s)F. Anjam
L. Carro
S. Wong
G.L. Nazar
M.B. Rutzig
Publication DateJuly 2012
Conference NameInternational Conference on Embedded Computer Systems: Architecture Modeling and Simulation
Period16-19 July 2012
LocationSamos, Greece
ISBNt.b.s.
Page Numbers
publishedPublished
Selected PublicationYes
Note
Topic(s)Adaptive Power/Performance Scaling
Theme(s)Electronic System Level Design
Project(s)ERA
rVEX
Group(s)Computer Engineering

IEEE BibTex entry:
@inproceedings{,
author = "F. Anjam and L. Carro and S. Wong and G.L. Nazar and M.B. Rutzig",
title = "Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor",
booktitle = "Proc. International Conference on Embedded Computer Systems: Architecture Modeling and Simulation",
address = "Samos, Greece",
month = "July",
year = "2012",
pages = ""
}