A Survey and Evaluation of FPGA High-Level Synthesis Tools 1524_a_survey_and_evaluation_of_fpga_highlevel_synthesis_tools.pdf

Publication TypeJournal Paper
TitleA Survey and Evaluation of FPGA High-Level Synthesis Tools
Author(s)R. Nane
V.M. Sima
C. Pilato
J. Choi
B Fort
A Canis
Y.T. Chen
H Hsiao
S Brown
F. Ferrandi
J Anderson
K.L.M. Bertels
Publication DateOctober 2016
Journal NameIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume35
Issue10
Page Numbers1591-1604
ISSN0278-0070
publishedPublished
Selected PublicationNo
Note
Topic(s)None
Theme(s)Electronic System Level Design
Project(s)EMC2
Group(s)Computer Engineering

IEEE BibTex entry:
@article{,
author = "R. Nane and V.M. Sima and C. Pilato and J. Choi and B Fort and A Canis and Y.T. Chen and H Hsiao and S Brown and F. Ferrandi and J Anderson and K.L.M. Bertels",
title = "A Survey and Evaluation of FPGA High-Level Synthesis Tools",
journal = "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems",
volume = "35",
issue = "10",
month = "October",
year = "2016",
pages = "1591-1604"
}