An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1} 16_an_efficient_fpga_design_of_residuetobinary_converter_for_t.pdf

Publication TypeJournal Paper
TitleAn Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1}
Author(s)K.A. Gbolagade
G.R. Voicu
S.D. Cotofana
Publication DateAugust 2011
Journal NameIEEE Transactions On Very Large Scale Integration (VLSI) Systems
Volume19
Issue8
Page Numbers1500-1503
ISSN1063-8210
publishedPublished
Selected PublicationNo
Note
Topic(s)None
Theme(s)None
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@article{,
author = "K.A. Gbolagade and G.R. Voicu and S.D. Cotofana",
title = "An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1}",
journal = "IEEE Transactions On Very Large Scale Integration (VLSI) Systems",
volume = "19",
issue = "8",
month = "August",
year = "2011",
pages = "1500-1503"
}