High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories 261_highperformance_clusterfault_tolerance_scheme_for_hybrid_n.pdf

Publication TypeConference Paper
TitleHigh-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories
Author(s)N.Z.B. Haron
S. Hamdioui
Publication DateOctober 2010
Conference Name25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Period6-8 October 2010
LocationKyoto, Japan
ISBN978-0-7695-4243-0
Page Numbers144-151
publishedPublished
Selected PublicationNo
Note
Topic(s)None
Theme(s)None
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@inproceedings{,
author = "N.Z.B. Haron and S. Hamdioui",
title = "High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories",
booktitle = "Proc. 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",
address = "Kyoto, Japan",
month = "October",
year = "2010",
pages = "144-151"
}