High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories 
Publication Type | Conference Paper |
---|---|
Title | High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories |
Author(s) | N.Z.B. Haron S. Hamdioui |
Publication Date | October 2010 |
Conference Name | 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems |
Period | 6-8 October 2010 |
Location | Kyoto, Japan |
ISBN | 978-0-7695-4243-0 |
Page Numbers | 144-151 |
published | Published |
Selected Publication | No |
Note | |
Topic(s) | None |
Theme(s) | None |
Project(s) | None |
Group(s) | Computer Engineering |
IEEE BibTex entry:
@inproceedings{,
author = "N.Z.B. Haron and S. Hamdioui",
title = "High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories",
booktitle = "Proc. 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",
address = "Kyoto, Japan",
month = "October",
year = "2010",
pages = "144-151"
}
author = "N.Z.B. Haron and S. Hamdioui",
title = "High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories",
booktitle = "Proc. 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",
address = "Kyoto, Japan",
month = "October",
year = "2010",
pages = "144-151"
}