Optimizing Memory BIST Address Generator Implementations 72_optimizing_memory_bist_address_generator_implementations.pdf

Publication TypeConference Paper
TitleOptimizing Memory BIST Address Generator Implementations
Author(s)A.J. van de Goor
H. Kukner
S. Hamdioui
Publication DateApril 2011
Conference Name6th International conference on Design & Technology of Integrated Systems in Nanoscale Era
Period6-8 April 2011
LocationAthens, Greece
ISBNt.b.s.
Page Numbers
publishedPublished
Selected PublicationNo
NoteBest Paper Award
Topic(s)None
Theme(s)None
Project(s)None
Group(s)Computer Engineering

IEEE BibTex entry:
@inproceedings{,
author = "A.J. van de Goor and H. Kukner and S. Hamdioui",
title = "Optimizing Memory BIST Address Generator Implementations",
booktitle = "Proc. 6th International conference on Design & Technology of Integrated Systems in Nanoscale Era",
address = "Athens, Greece",
month = "April",
year = "2011",
pages = ""
}