T. Niggemeier

NameT. Niggemeier
First NameTim
E-mail
Author TypeExternal
Affiliation

Publications

M. Berekovic, T. Niggemeier, A Scalable, Multi-Thread, Multi-Issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme 716_a_scalable_multithread_multiissue_array_processor_archit.pdf (July 2006), 6th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2006), 17-20 July 2006, Samos, Greece [Conference Paper]