V. van der Leest
Name | V. van der Leest |
---|---|
First Name | |
Vincent.van.der.Leest@intrinsic-id.com | |
Author Type | External |
Affiliation | Intrinsic-ID |
Publications
A.M.M.O. Cortez, S. Hamdioui, A. Kaichouhi, V. van der Leest, R. Maes, G.J. Schrijen,
Intelligent Voltage Ramp-up Time Adaptation for Temperature Noise Reduction on Memory-based PUF Systems
(April 2015),
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 34, issue 7
, DOI: 10.1109/TCAD.2015.2422844
[Journal Paper]
A.M.M.O. Cortez, V. van der Leest, R. Maes, G.J. Schrijen, S. Hamdioui,
Adapting Voltage Ramp-up Time for Temperature Noise Reduction on Memory-based PUFs
(June 2013),
IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2013), 2-3 June 2013, Austin, USA
[Conference Paper]
A.M.M.O. Cortez, S. Hamdioui, V. van der Leest, R. Maes, G.J. Schrijen,
Noise Reduction on Memory-based PUFs
(March 2013),
1st Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2013), 30-31 May 2013, Avignon, France
[Conference Paper]
A.M.M.O. Cortez, V. van der Leest, G.J. Schrijen, S. Hamdioui,
Investigation of Voltage Ramp-up Time for Temperature Noise Reduction on Memory-based PUFs
(October 2012),
ICT.OPEN 2012 (ICT.OPEN 2012), 22-23 October 2012, Rotterdam, The Netherlands
[Conference Paper]