L Petrica

NameL Petrica
First NameLucian
Author TypeExternal
AffiliationFaculty of Electronics, Telecommunication, and Information Technology, "Politehnica" University of Bucharest


A. Gheolbanoiu, L Petrica, S.D. Cotofana, Hybrid Adaptive Clock Management for FPGA Processor Acceleration (March 2015), 18th Design, Automation & Test in Europe conference (DATE 2015), 9-13 March 2015, Grenoble, France [Conference Paper]
C Bira, L Gugu, R Hobincu, V Codreanu, L Petrica, S.D. Cotofana, An Energy Effective SIMD Accelerator for Visual Pattern Matching 1368_an_energy_effective_simd_accelerator_for_visual_pattern_mat.pdf (June 2013), 4th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2013), 13-14 June 2013, Edinburgh, Scotland [Conference Paper]
L Petrica, V Codreanu, S.D. Cotofana, VASILE: A Reconfigurable Vector Architecture for Instruction Level Frequency Scaling 1367_vasile_a_reconfigurable_vector_architecture_for_instructio.pdf (June 2013), 12th IEEE Low Voltage Low Power Conference (FTFC 2013), 20-21 June 2013, Paris, France [Conference Paper]