P.J. de Langen
Name | P.J. de Langen |
---|---|
First Name | Pepijn |
Author Type | Phd Student |
Affiliation | TU Delft |
Publications
P.J. de Langen,
Energy Reduction Techniques for Caches and Multiprocessors
(October 2009),
[Phd Thesis]
P.J. de Langen, B.H.H. Juurlink,
Limiting the Number of Dirty Cache Lines
(April 2009),
Design, Automation and Test in Europe (DATE 2009), 20-24 April 2009, Nice, France
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Memory Copies in Multi-Level Memory Systems
(July 2008),
19th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2008), 2-4 July 2008, Leuven, Belgium
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Leakage-Aware Multiprocessor Scheduling
(May 2008),
Journal of Signal Processing Systems (JSPS), volume 57, issue 1
[Journal Paper]
P.J. de Langen, B.H.H. Juurlink,
Trade-offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors
(July 2007),
7th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2007), 16-19 July 2007, Samos, Greece
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Combining Voltage Scaling and Processor Shutdown to Reduce Energy Consumption in Embedded Multiprocessors
(June 2007),
13th Annual Conference of the Advanced School for Computing ang Imaging (ASCI 2007), June 2007, Heijen, The Netherlands
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Reducing Conflict Misses in Caches by Using Application Specific Placement Functions
(November 2006),
17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Leakage-Aware Multiprocessor Scheduling for Low Power
(April 2006),
20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 25-29 April 2006, Rhodes Island, Greece
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink, S. Vassiliadis,
Multiprocessor Scheduling to Reduce Leakage Power
(November 2005),
16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink, S. Vassiliadis,
HandBench: A Benchmarking Suite for Processors Embedded in Handheld Devices
(November 2004),
15th Annual Workshop on Circuits, Systems and Signal Processing (ProRisc 2004), 25-26 November 2004, Veldhoven, The Netherlands
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Reducing Traffic Generated by Conflict Misses in Caches
(April 2004),
1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy
[Conference Paper]
B.H.H. Juurlink, P.J. de Langen,
Dynamic Techniques to Reduce Memory Traffic in Embedded Systems
(April 2004),
1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy
[Conference Paper]
P.J. de Langen, B.H.H. Juurlink,
Reducing Conflict Misses in Caches
(November 2003),
14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands
[Conference Paper]
P.J. de Langen,
Adapting the Cache Line Size to Reduce Off-Chip Memory Traffic
(June 2003),
[Msc Thesis]
P.J. de Langen, B.H.H. Juurlink,
Off-chip memory traffic measurements of low-power embedded systems
(November 2002),
13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands
[Conference Paper]