P. Celinski, S.F. Al-Sarawi, D. Abbott, S.D. Cotofana, S. Vassiliadis, Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach (February 2004), IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 19-20 February 2004, Lafayette, USA [Conference Paper]

P. Celinski, S.D. Cotofana, J.F. Lopez, S.F. Al-Sarawi, D. Abbott, State-of-the-Art in CMOS Threshold-Logic VLSI Gate Implementations and Applications (May 2003), SPIE International Symposium on Microtechnologies for the New Millennium, 19-21 May 2003, San Agustín, Gran Canaria, Spain , Invited Paper [Conference Paper]