M.A. Wahlah
Name | M.A. Wahlah |
---|---|
First Name | Aqeel |
M.A.Wahlah@tudelft.nl | |
Author Type | Phd Student |
Affiliation | TU Delft |
Publications
J.Y. Hur, K.G.W. Goossens, L. Mhamdi, M.A. Wahlah,
Comparative Analysis of Soft and Hard On-Chip Interconnects for FPGAs
(December 2012),
IET Computers & Digital Techniques (CDT), volume 6, issue 1
[Journal Paper]
![1334_comparative_analysis_of_soft_and_hard_onchip_interconnects.pdf](/images/pdf-a.png)
M.A. Wahlah, K.G.W. Goossens,
PUMA: Placement Unification with Mapping and guaranteed throughput Allocation on an FPGA Using A Hardwired NoC
(September 2011),
14th Euromicro Conference On Digital System Design (DSD 2011), 31 August - 2 September 2011, Oulu, Finland
[Conference Paper]
M.A. Wahlah, K.G.W. Goossens,
A Non-Intrusive Online FPGA Test Scheme Using A Hardwired Network on Chip
(September 2011),
14th Euromicro Conference On Digital System Design (DSD 2011), 31 August - 2 September 2011, Oulu, Finland
[Conference Paper]
M.A. Wahlah, K.G.W. Goossens,
Composable And Persistent-State Application Swapping On FPGAs Using Hardwired Network on Chip
(December 2009),
International Conference on Reconfigurable Computing and FPGAs (ReConFig 2009), 9-11 December 2009, Cancun, Mexico
[Conference Paper]
![380_composable_and_persistentstate_application_swapping_on_fpga.pdf](/images/pdf-a.png)
M.A. Wahlah, K.G.W. Goossens,
3-Tier Reconfiguration Model For FPGAs Using Hardwired Network on Chip
(December 2009),
International Conference on Field-Programmable Technology (FPT 2009), 9-11 December 2009, Sidney, Australia
[Conference Paper]
![369_3tier_reconfiguration_model_for_fpgas_using_hardwired_netwo.pdf](/images/pdf-a.png)
M.A. Wahlah, K.G.W. Goossens,
Run-Time FPGA Testing Using Hardwired Network on Chip
(November 2009),
20th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2009), 26-27 November 2009, Veldhoven, The Netherlands
[Conference Paper]
M.A. Wahlah, K.G.W. Goossens,
Modeling reconfiguration in a FPGA with a hardwired network on chip
(May 2009),
16th Reconfigurable Architectures Workshop (RAW 2009), 25-26 May 2009, Rome, Italy
[Conference Paper]
![339_modeling_reconfiguration_in_a_fpga_with_a_hardwired_network.pdf](/images/pdf-a.png)
M.A. Wahlah, K.G.W. Goossens,
Hardwired NOC Infrastructure with Integrated Configuration and Functional Architecture
(November 2008),
19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands
[Conference Paper]
K.G.W. Goossens, M. Bennebroek, J.Y. Hur, M.A. Wahlah,
Hardwired Networks on Chip in FPGAs to unify Data and Configuration Interconnects
(April 2008),
2nd International Symposium on Networks-on-Chips (NOCS 2008), 5-6 April 2008, Newcastle, UK
[Conference Paper]
![488_hardwired_networks_on_chip_in_fpgas_to_unify_data_and_config.pdf](/images/pdf-a.png)