P.T. Stathis
Name | P.T. Stathis |
---|---|
First Name | Pyrrhos |
Author Type | Phd Student |
Affiliation | TU Delft |
Publications
P.T. Stathis, D. Cheresiz, S. Vassiliadis, B.H.H. Juurlink,
Sparse Matrix Transpose Unit
(April 2004),
18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 26-30 April 2004, Santa Fe, USA
[Conference Paper]
![942_sparse_matrix_transpose_unit.pdf](/images/pdf-a.png)
P.T. Stathis, S. Vassiliadis, S.D. Cotofana,
D-SAB: A Sparse Matrix Benchmark Suite
(September 2003),
7th International Conference on Parallel Computing Technologies (PaCT 2003), 15-19 September 2003, Novosibirsk, Russia
[Conference Paper]
![1006_dsab_a_sparse_matrix_benchmark_suite.pdf](/images/pdf-a.png)
P.T. Stathis, S. Vassiliadis, S.D. Cotofana,
A Hierarchical Sparse Matrix Storage Format for Vector Processors
(April 2003),
17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France
[Conference Paper]
![1038_a_hierarchical_sparse_matrix_storage_format_for_vector_proc.pdf](/images/pdf-a.png)
P.T. Stathis, S. Vassiliadis, S.D. Cotofana,
Design considerations of a multiple inner product and accumulate vector functional unit
(November 2002),
13th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2002), 27-29 November 2002, Veldhoven, The Netherlands
[Conference Paper]
![1166_design_considerations_of_a_multiple_inner_product_and_accum.pdf](/images/pdf-a.png)
S.D. Cotofana, P.T. Stathis, S. Vassiliadis,
Direct and transposed sparse matrix-vector multiplication
(April 2002),
4th International Conference on Massively Parallel Computing Systems (MPCS 2002), 10-12 April 2002, Ischia, Italy
[Conference Paper]
![1123_direct_and_transposed_sparse_matrixvector_multiplication.pdf](/images/pdf-a.png)
P.T. Stathis, S.D. Cotofana, S. Vassiliadis,
Sparse Matrix Vector Multiplication Evaluation Using the BBCS scheme
(November 2001),
8th Panhellenic Conference on Informatics , 8-10 November 2001, Nicosia, Cyprus
[Conference Paper]
![1220_sparse_matrix_vector_multiplication_evaluation_using_the_bb.pdf](/images/pdf-a.png)
P.T. Stathis, S. Vassiliadis, S.D. Cotofana,
Transposition Mechanism for sparse matrices on vector processors
(November 2001),
12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands
[Conference Paper]
![1219_transposition_mechanism_for_sparse_matrices_on_vector_proce.pdf](/images/pdf-a.png)
S. Vassiliadis, S.D. Cotofana, P.T. Stathis,
BBCS based sparse matrix-vector multiplication: initial evaluation
(August 2000),
16th IMACS World Congress on Scientific Computation, Applied Mathematics and Simulation (IMACS 2000), 21-25 August 2000, Lausanne, Switzerland
[Conference Paper]
![1252_bbcs_based_sparse_matrixvector_multiplication_initial_eva.pdf](/images/pdf-a.png)
S. Vassiliadis, S.D. Cotofana, P.T. Stathis,
Block Based Compression Storage Expected Performance
(June 2000),
14th International Conference on High Performance Computing Systems and Applications (HPCS 2000), 14-17 June 2000, Victoria, Canada
[Conference Paper]
![1262_block_based_compression_storage_expected_performance.pdf](/images/pdf-a.png)