C. Papameletis,, B. Keller, V. Chickermane, E.J. Marinissen, S. Hamdioui, Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers (May 2013), 18th IEEE European Test Symposium (ETS 2013), 27-31 May 2013, Avignon, France [Conference Paper]

C. Papameletis,, B. Keller, V. Chickermane, E.J. Marinissen, Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers (May 2013), 18th IEEE European Test Symposium (ETS 2013), 27-31 May 2013, Avignon, France [Conference Proceedings]

C. Papameletis,, esign-for-Testability Automation for 3D Stacked ICs (August 2012), [Msc Thesis]