J. Chen

NameJ. Chen
First NameJiaoyan
E-mailJoyan.Chen@tudelf.nl
Author TypePostDoc
AffiliationComputer Engineering, TU Delft

Publications

J. Chen, S.D. Cotofana, S. Grandhi, C. Spagnol, E. Popovici, Inverse Gaussian Distribution Based Timing Analysis of Sub-Threshold CMOS Circuits (December 2015), Microelectronics Reliability, volume 55, issue 12 [Journal Paper]
A. Amaricai, N. Cucu Laurenciu, O. Boncalo, J. Chen, S. Nimara, V. Savin, S.D. Cotofana, Multi-Level Probabilistic Timing Error Reliability Analysis Using a Circuit Dependent Fault Map Generation (November 2015), XXX Conference on Design of Circuits and Integrated Systems (DCIS 2015), 25-27 November 2015, Estoril, Portugal [Conference Paper]
A. Amaricai, V. Savin, O. Boncalo, N. Cucu Laurenciu, J. Chen, S.D. Cotofana, Timing Error Analysis of Flooded LDPC Decoders (November 2015), IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS), 2-4 November 2015, Tel-Aviv, Israel [Conference Paper]
J. Chen, A. Tisserand, E. Popovici, S.D. Cotofana, Asynchronous Charge Sharing Power Consistent Montgomery Multiplier (May 2015), 21st IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 4-6 May 2015, Mountain View, Silicon Valley, California, USA [Conference Paper]
J. Chen, E. Popovici, A. Tisserand, S.D. Cotofana, Robust Sub-Powered Asynchronous Logic (September 2014), International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS 2014), 29 September - 1 October 2014, Palma de Mallorca, Spain [Conference Paper]
S. Grandhi, C. Spagnol, J. Chen, E. Popovici, S.D. Cotofana, Reliability Aware Logic Synthesis through Rewriting (September 2014), 27th International IEEE SoC (System-on-Chip) Conference (SOCC), 2-5 September, Las Vegas, USA [Conference Paper]
J. Chen, C. Spagnol, S. Grandhi, E. Popovici, A. Amaricai, S.D. Cotofana, Linear Compositional Delay Model for the Timing Analysis of Sub-Powered Combinational Circuits 1441_linear_compositional_delay_model_for_the_timing_analysis_of.pdf (July 2014), IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2014), 9-11 July 2014, Tampa, USA [Conference Paper]