Y. Jiang, N. Cucu Laurenciu, S.D. Cotofana, On Basic Boolean Function Graphene Nanoribbon Conductance Mapping (December 2018), IEEE Transactions on Circuits and Systems Part I: Regular Papers (TCAS I) [Journal Paper]

N. Cucu Laurenciu, S.D. Cotofana, On Effective Graphene based Computing (October 2018), 41st International Semiconductor Conference (CAS 2018), 10-12 October 2018, Sinaia, Romania [Conference Paper]

Y. Jiang, N. Cucu Laurenciu, S.D. Cotofana, Complementary Arranged Graphene Nanoribbon-based Boolean Gates (July 2018), 14th IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2018), 17-19 July 2018, Athens, Greece [Conference Paper]

Y. Jiang, N. Cucu Laurenciu, S.D. Cotofana, Non-Equilibrium Green Function-based Verilog-A Graphene Nanoribbon Model (July 2018), 18th IEEE International Conference on Nanotechnology (IEEE NANO 2018), 23-26 July 2018, Cork, Ireland [Conference Paper]

Y. Jiang, N. Cucu Laurenciu, S.D. Cotofana, On Carving Basic Boolean Functions on Graphene Nanoribbons Conduction Maps (May 2018), IEEE International Symposium on Circuits and Systems (ISCAS), 27-30 May 2018, Florence [Conference Paper]

N. Cucu Laurenciu, S.D. Cotofana, Haar-based Interconnect Coding for Energy Effective Medium/Long Range Data Transport (September 2017), 30th IEEE International System-on-Chip Conference (SOCC 2017), 5-8 September 2017, Munich, Germany [Conference Paper]

N. Cucu Laurenciu, S.D. Cotofana, Fast and Accurate Workload-Level Neural Network Based IC Energy Consumption Estimation (June 2017), International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2017), 12-15 June 2017, Taormina, Italy [Conference Paper]

N. Cucu Laurenciu, T. Gupta, V. Savin, S.D. Cotofana, Error Correction Code Protected Data Processing Units (July 2016), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2016), 18-20 July 2016, Beijing, China [Conference Paper]

A. Amaricai, N. Cucu Laurenciu, O. Boncalo, J. Chen, S. Nimara, V. Savin, S.D. Cotofana, Multi-Level Probabilistic Timing Error Reliability Analysis Using a Circuit Dependent Fault Map Generation (November 2015), XXX Conference on Design of Circuits and Integrated Systems (DCIS 2015), 25-27 November 2015, Estoril, Portugal [Conference Paper]

A. Amaricai, V. Savin, O. Boncalo, N. Cucu Laurenciu, J. Chen, S.D. Cotofana, Timing Error Analysis of Flooded LDPC Decoders (November 2015), IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS), 2-4 November 2015, Tel-Aviv, Israel [Conference Paper]

N. Cucu Laurenciu, S.D. Cotofana, Low Cost and Energy, Thermal Noise Driven, Probability Modulated Random Number Generator (May 2015), IEEE International Symposium on Circuits and Systems (ISCAS 2015), 24-27 May 2015, Lisbon, Portugal [Conference Paper]

N. Cucu Laurenciu, S.D. Cotofana, Probability Density Function Based Reliability Evaluation of Large-Scale ICs (July 2014), 10th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2014), 8-10 July 2014, Paris, France [Conference Paper]

N. Cucu Laurenciu, S.D. Cotofana, Critical Transistors Nexus Based Circuit-Level Aging Assessment and Prediction (June 2014), Journal of Parallel and Distributed Computing, volume 74, issue 6 [Journal Paper]

N. Cucu Laurenciu, S.D. Cotofana, A Direct Measurement Scheme of Amalgamated Aging Effects with Novel On-Chip Sensor (October 2013), 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2013), 7-9 October 2013, Istanbul, Turkey [Conference Paper]

N. Cucu Laurenciu, S.D. Cotofana, A Nonlinear Degradation Path Dependent End-of-Life Estimation Framework from Noisy Observations (September 2013), Microelectronics Reliability, volume 53, issue 9-11 [Journal Paper]

N. Cucu Laurenciu, S.D. Cotofana, Context Aware Slope Based Transistor-Level Aging Model (October 2012), Microelectronics Reliability, volume 52, issue 9-10 [Journal Paper]

N. Cucu Laurenciu, S.D. Cotofana, A Markovian, Variation-Aware Circuit-Level Aging Model (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands [Conference Paper]

N. Cucu Laurenciu, RNS support for RSA cryptography (November 2010), [Msc Thesis]