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J.W. van de Waerdt

NameJ.W. van de Waerdt
First NameJan Willem
E-mail
Author TypePhd Student
AffiliationTU Delft

Publications

J.W. van de Waerdt, The TM3270 Media-processor 800_the_tm3270_mediaprocessor.pdf (October 2006), [Phd Thesis]
J.W. van de Waerdt, S. Vassiliadis, E.W. Bellers, J.G.W.M. Janssen, Motion Estimation and Temporal Up-Conversion on the TM3270 Media-Processor 806_motion_estimation_and_temporal_upconversion_on_the_tm3270_m.pdf (January 2006), International Conference on Consumer Electronics (ICCE 2006), 7-11 January 2006, Las Vegas, USA [Conference Paper]
R. Wester, G. Slavenburg, J.W. van de Waerdt, Reducing cache effects of certain code pieces (November 2005), filed in Europe [Patent]
J.W. van de Waerdt, S. Vassiliadis, N. Engin, The TM3270 media-processor 884_the_tm3270_mediaprocessor.pdf (November 2005), 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2005), 12-16 November 2005, Barcelona, Spain [Conference Paper]
J.W. van de Waerdt, J. Hoogerbrugge, Using a cache miss pattern to address a stride prediction table (October 2005), filed in Europe [Patent]
J.W. van de Waerdt, S. Vassiliadis, J.P. van Itegem, H. van Antwerpen, The TM3270 Media-Processor Data Cache 892_the_tm3270_mediaprocessor_data_cache.pdf (October 2005), 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, USA [Conference Paper]
J. Hoogerbrugge, J.W. van de Waerdt, Counter based stride prediction table data prefetching (September 2005), filed in Europe [Patent]
J.W. van de Waerdt, SDRAM address mapping optimized for two-dimensional accesses (August 2005), filed in Europe [Patent]
J.W. van de Waerdt, Memory region based data pre-fetching (August 2005), filed in USA [Patent]
J.W. van de Waerdt, S. Vassiliadis, E.W. Bellers, J.G.W.M. Janssen, Temporal Video Up-Conversion on a Next-Generation Media-Processor 818_temporal_video_upconversion_on_a_nextgeneration_mediaproc.pdf (August 2005), 7th IASTED International Conference on Signal and Image Processing (SIP 2005), 15-17 August 2005, Honolulu, Hawaii, USA [Conference Paper]
P. Stravers, J.W. van de Waerdt, Iterative translation lookaside buffer (July 2005), filed in Europe [Patent]
J.W. van de Waerdt, S. Vassiliadis, Instruction Set Architecture Enhancements for Video Processing 830_instruction_set_architecture_enhancements_for_video_processi.pdf (July 2005), 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece [Conference Paper]
J.W. van de Waerdt, Processor prefetch to match memory bus protocol characteristics (June 2005), filed in Europe [Patent]
G. Slavenburg, J.W. van de Waerdt, System and method for a fully synthesizable superpipelined VLIW processor (June 2005), filed in Europe [Patent]
J.W. van de Waerdt, Instruction cache way prediction for jump targets (May 2005), filed in Europe [Patent]
J.W. van de Waerdt, J.P. van Itegem, G. Slavenburg, S. Vassiliadis, Motion Estimation Performance of the TM3270 855_motion_estimation_performance_of_the_tm3270.pdf (March 2005), 20th ACM Symposium on Applied Computing (SAC 2005), 13 -17 March 2005, Santa Fe, USA [Conference Paper]
J.W. van de Waerdt, Fast and accurate cache way selection method to enable non-speculative data forwarding (January 2004), filed in Europe [Patent]
J.W. van de Waerdt, P. Stravers, Cache way prediction based on instruction base register (November 2003), filed in Europe [Patent]