M Pereira
Name | M Pereira |
---|---|
First Name | Monica |
Author Type | External |
Affiliation | Universidade Federal Rio Grande do Norte, Brazil |
Publications
AG Erichsen, A. L. Sartor, J.D. Sousa, M Pereira, S. Wong, A.C.S. Beck,
ISA-DTMR: Selective Protection in Configurable Heterogeneous Multicores
(May 2018),
The 14th International Symposium on Applied Reconfigurable Computing (ARC 2018), 2-4 May 2018, Santorini, Greece
[Conference Paper]
![1704_isadtmr_selective_protection_in_configurable_heterogeneou.pdf](/images/pdf-a.png)
R. Ferreira, W Denver, M Pereira, S. Wong, C. A. L. Arthur Lang Lisbôa, L. Carro,
A Dynamic Modulo Scheduling with Binary Translation: Loop Optimization with Software Compatibility
(January 2015),
Journal of Signal Processing Systems (JSPS)
, http://link.springer.com/article/10.1007/s11265-015-0974-8
[Journal Paper]
![1503_a_dynamic_modulo_scheduling_with_binary_translation_loop_o.pdf](/images/pdf-a.png)
R. Ferreira, W Denver, M Pereira, J Quadros, L. Carro, S. Wong,
A Run-Time Modulo Scheduling by using a Binary Translation Mechanism
(July 2014),
International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2014), 14-17 July 2014 , Samos, Greece
[Conference Paper]
![1462_a_runtime_modulo_scheduling_by_using_a_binary_translation.pdf](/images/pdf-a.png)
R. Ferreira, V. Duarte, W. Meireles, M Pereira, L. Carro, S. Wong,
A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures
(July 2013),
International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2013), 15-18 July 2013, Samos, Greece
[Conference Paper]
![1428_a_justintime_modulo_scheduling_for_virtual_coarsegrained.pdf](/images/pdf-a.png)