J.D. Sousa, A. L. Sartor, L. Carro, M.B. Rutzig, S. Wong, A.C.S. Beck, DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability (May 2018), The 14th International Symposium on Applied Reconfigurable Computing (ARC 2018), 2-4 May 2018, Santorini, Greece [Conference Paper]

AG Erichsen, A. L. Sartor, J.D. Sousa, M Pereira, S. Wong, A.C.S. Beck, ISA-DTMR: Selective Protection in Configurable Heterogeneous Multicores (May 2018), The 14th International Symposium on Applied Reconfigurable Computing (ARC 2018), 2-4 May 2018, Santorini, Greece [Conference Paper]

P. H. E. Becker, A. L. Sartor, M Brandalero, TT Jost, S. Wong, L. Carro, A.C.S. Beck, A Low-Cost BRAM-Based Function Reuse for Configurable Soft-Core Processors in FPGAs (May 2018), The 14th International Symposium on Applied Reconfigurable Computing (ARC 2018), 2-4 May 2018, Santorini, Greece [Conference Paper]

A. L. Sartor, P. H. E. Becker, J.J. Hoozemans, S. Wong, A.C.S. Beck, Dynamic Trade-off among Fault Tolerance, Energy Consumption, and Performance on a Multiple-issue VLIW Processor (October 2017), IEEE Transactions on Multi-Scale Computing Systems (TMSCS), volume PP, issue 99 [Journal Paper]

A. L. Sartor, A. F Lorenzon, L. Carro, F. Kastensmidt, S. Wong, A.C.S. Beck, Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW Processors (January 2017), ACM Journal on Emerging Technologies in Computing Systems (JETC), volume 13, issue 2 [Journal Paper]

A. L. Sartor, S. Wong, A.C.S. Beck, Adaptive ILP Control to increase Fault Tolerance for VLIW Processors (July 2016), The 27th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2016), 6-8 July 2016, London, UK [Conference Paper]

Q Guo, A. L. Sartor, A.A.C. Brandon, A.C.S. Beck, X. Zhou, S. Wong, Run-time Phase Prediction for a Reconfigurable VLIW Processor (March 2016), Design, Automation and Test in Europe (DATE 2016), 14-18 March 2016, Dresden, Germany [Conference Paper]

A.A.C. Brandon, J.J. Hoozemans, J. van Straten, A. F Lorenzon, A. L. Sartor, A.C.S. Beck, S. Wong, A Sparse VLIW Instruction Encoding Scheme Compatible with Generic Binaries (December 2015), 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig 2015), 7-9 December 2015, Mayan Riviera, Mexico [Conference Paper]

J.S.P. Giraldo, A. L. Sartor, L. Carro, S. Wong, A.C.S. Beck, Evaluation of energy savings on a VLIW processor through dynamic issue-width adaptation (October 2015), 2015 International Symposium on Rapid System Prototyping (RSP2015), 8-9 October 2016, Pittsburgh, PA, USA [Conference Paper]

A. L. Sartor, A. F Lorenzon, L. Carro, F. Kastensmidt, S. Wong, A.C.S. Beck, A Novel Phase-based Low Overhead Fault Tolerance Approach for VLIW Processors (July 2015), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 08-10 July 2015, Montpellier, France [Conference Paper]