Computer Engineering Publications Database (2000-2018) J. Vollrath
| Name | J. Vollrath |
|---|---|
| First Name | Joerg |
| Author Type | External |
| Affiliation |
Publications
Z. Al-Ars, S. Hamdioui, A.J. van de Goor, G.N. Gaydadjiev, J. Vollrath,
DRAM-Specific Space of Memory Tests
(October 2006),
IEEE International Test Conference (ITC 2006), 22-27 October 2006, Santa Clara, USA
[Conference Paper]
(October 2006),
IEEE International Test Conference (ITC 2006), 22-27 October 2006, Santa Clara, USA
[Conference Paper]
Z. Al-Ars, S. Hamdioui, G. Mueller, J. Vollrath,
Bitline-Coupled Precharge Faults and Their Detection in Memory Devices
(May 2006),
11th IEE European Test Symposium (ETS 2006), 21-24 May 2006, Southampton, UK
[Conference Paper]
(May 2006),
11th IEE European Test Symposium (ETS 2006), 21-24 May 2006, Southampton, UK
[Conference Paper]
Z. Al-Ars, S. Hamdioui, J. Vollrath,
Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach
(December 2005),
14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India
[Conference Paper]
(December 2005),
14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India
[Conference Paper]