N. Khammassi

NameN. Khammassi
First NameNader
Author TypeExternal
AffiliationENSTA Bretagne, France


I. Ashraf, N. Khammassi, M. Taouil, K.L.M. Bertels, Memory and Communication Profiling for Accelerator-based Platforms 1681_memory_and_communication_profiling_for_acceleratorbased_pl.pdf (December 2017), IEEE Transactions on Computers (TC), volume PP, issue 29 , Pre-print [Journal Paper]
X. Fu, M. A. Rol, C.C. Bultink, J. van Someren, N. Khammassi, I. Ashraf, R.F.L. Vermeulen, J. C. de Sterke, W.J. Vlothuizen, R.N. Schouten, C.G. Almudever, L. DiCarlo, K.L.M. Bertels, An Experimental Microarchitecture for a Superconducting Quantum Processor 1693_an_experimental_microarchitecture_for_a_superconducting_qua.pdf (October 2017), 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2017), 14-18 October 2017, Boston, USA , Best Paper Award [Conference Proceedings]
C.G. Almudever, L. Lao, X. Fu, N. Khammassi, I. Ashraf, D. Iorga, S. Varsamopulos, C. Eichler, A. Wallraff, L. Geck, A. Kruth, J. Knoch, H. Bluhm, K.L.M. Bertels, The Engineering Challenges in Quantum Computing (March 2017), Design, Automation and Test in Europe (DATE 2017), 27-31 March 2017, Lausanne, Switzerland [Conference Proceedings]
N. Khammassi, I. Ashraf, X. Fu, C.G. Almudever, K.L.M. Bertels, QX: A High-Performance Quantum Computer Simulation Platform (March 2017), Design, Automation and Test in Europe (DATE 2017), 27-31 March 2017, Lausanne, Switzerland [Conference Proceedings]
I. Ashraf, K.L.M. Bertels, N. Khammassi, J.C. Le Lann, Communication-aware Parallelization Strategies for High Performance Applications 1487_communicationaware_parallelization_strategies_for_high_per.pdf (July 2015), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 08-10 July 2015, Montpellier, France [Conference Paper]
N. Khammassi, J.C. Le Lann, XPU: A C++ Metaprogramming Approach to Ease Parallelism Expression: Parallelization Methodology, Internal Design and Practical Application (November 2014), Book Title "Parallel Programming: Practical Aspects, Models and Current Limitations", Published by Nova Science Publishers, Inc., Hauppauge, NY, USA [Book Chapter]
N. Khammassi, J.C. Le Lann, A High-Level Programming Model to Ease Pipeline Parallelism Expression On Shared Memory Multicore Architectures (April 2014), ACM High Performance Computing Symposium (HPC 2014), 13-16 April 2014, Tampa, USA , HPC '14 Proceedings of the High Performance Computing Symposium Article No. 9 [Conference Proceedings]
N. Khammassi, J.C. Le Lann, Design and Implementation Of A Cache Hierarchy-Aware Task Scheduling For Parallel Loops On Multicore Architectures (February 2014), Third International conference on Parallel, Distributed Computing technologies and Applications (PDCTA 2014), 3-10 February 2014, Sydney, Australia [Conference Proceedings]
N. Khammassi, J.C. Le Lann, Tackling Real-Time Signal Processing Applications on Shared Memory Multicore Architectures Using XPU (February 2014), Embedded Real Time Software and Systems (ERTS 2014), 5-7 Februari 2014, Toulouse, France [Conference Proceedings]
N. Khammassi, J.C. Le Lann, J.Ph. Diguet, A. Skrzyniarz, MHPM: Multi-Scale Hybrid Programming Model: A Flexible Parallelization Methodology (June 2012), IEEE International Conference on High Performance Computing (HPCC 2012), 25-27 June 2012, Liverpool, United Kindom , Liverpool, UK [Conference Proceedings]