D. Borodin
Name | D. Borodin |
---|---|
First Name | Demid |
D.Borodin@tudelft.nl | |
Author Type | PostDoc |
Affiliation | TU Delft |
Publications
S. Safiruddin, M. Lefter, D. Borodin, G.R. Voicu, S.D. Cotofana,
Zero-Performance-Overhead Online Fault Detection and Diagnosis in 3D Stacked Integrated Circuits
(July 2012),
IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands
[Conference Paper]
![1308_zeroperformanceoverhead_online_fault_detection_and_diagno.pdf](/images/pdf-a.png)
S. Safiruddin, D. Borodin, M. Lefter, G.R. Voicu, S.D. Cotofana,
Is 3D Integration The Way to Future Dependable Computing Platforms?
(May 2012),
13th International Conference on Optimization of Electrical and Electronic Equipment (OPTIM 2012), 24-26 May 2012, Brasov, Romania
[Conference Paper]
![1307_is_3d_integration_the_way_to_future_dependable_computing_pl.pdf](/images/pdf-a.png)
D. Borodin, W. Siauw, S.D. Cotofana,
Functional Unit Sharing Between Stacked Processors in 3D Integrated Systems
(July 2011),
International Conference on Embedded Computer Systems: Architectures, Models, and Simulations (SAMOS XI), 18-21 July 2011, Samos, Greece
[Conference Paper]
![42_functional_unit_sharing_between_stacked_processors_in_3d_inte.pdf](/images/pdf-a.png)
D. Borodin, B.H.H. Juurlink,
Protective Redundancy Overhead Reduction Using Instruction Vulnerability Factor
(May 2010),
ACM International Conference on Computing Frontiers (CF 2010), 17-19 May 2010, Bertinoro, Italy
[Conference Paper]
![190_protective_redundancy_overhead_reduction_using_instruction_v.pdf](/images/pdf-a.png)
D. Borodin, B.H.H. Juurlink,
Instruction Precomputation with Memoization for Fault Detection
(March 2010),
Design, Automation and Test in Europe (DATE 2010), 8-12 March 2010, Dresden, Germany
[Conference Paper]
![205_instruction_precomputation_with_memoization_for_fault_detect.pdf](/images/pdf-a.png)
D. Borodin, B.H.H. Juurlink, S. Hamdioui, S. Vassiliadis,
Instruction-Level Fault Tolerance Configurability
(October 2009),
Journal of Signal Processing Systems (JSPS), volume 57, issue 1
[Journal Paper]
![400_instructionlevel_fault_tolerance_configurability.pdf](/images/pdf-a.png)
D. Borodin, B.H.H. Juurlink, S. Kaxiras,
Instruction Precomputation for Fault Detection
(August 2009),
12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009), 27-29 August 2009, Patras, Greece
[Conference Paper]
![296_instruction_precomputation_for_fault_detection.pdf](/images/pdf-a.png)
A. Shahbahrami, D. Borodin, B.H.H. Juurlink,
Comparison Between Color and Texture Features for Image Retrieval
(November 2008),
19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands
[Conference Paper]
![525_comparison_between_color_and_texture_features_for_image_retr.pdf](/images/pdf-a.png)
D. Borodin, B.H.H. Juurlink,
A Low-Cost Cache Coherence Verification Method for Snooping Systems
(September 2008),
11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2008), 3-5 September 2008, Parma, Italy
[Conference Paper]
![422_a_lowcost_cache_coherence_verification_method_for_snooping.pdf](/images/pdf-a.png)
C.M. van der Hoeven, B.H.H. Juurlink, D. Borodin,
The SimpleScalar Macro Tool (SSIT)
(November 2007),
18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands
[Conference Paper]
![665_simplescalar_macro_tool.pdf](/images/pdf-a.png)
D. Borodin, B.H.H. Juurlink, S. Vassiliadis,
Instruction-Level Fault Tolerance Configurability
(July 2007),
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2007), 16-19 July 2007, Samos, Greece
[Conference Paper]
![595_instructionlevel_fault_tolerance_configurability.pdf](/images/pdf-a.png)
A. Shahbahrami, B.H.H. Juurlink, D. Borodin, S. Vassiliadis,
Avoiding Conversion and Rearrangement Overhead in SIMD Architectures
(June 2006),
International Journal of Parallel Programming (IJPP), volume 34, issue 3
[Journal Paper]
![742_avoiding_conversion_and_rearrangement_overhead_in_simd_archi.pdf](/images/pdf-a.png)
D. Borodin, A. Terechko, B.H.H. Juurlink, P. Stravers,
Optimisation of Multimedia Applications for the Philips Wasabi Multiprocessor System
(November 2005),
16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands
[Conference Paper]
![875_optimisation_of_multimedia_applications_for_the_philips_wasa.pdf](/images/pdf-a.png)
D. Borodin,
Optimisation of Multimedia Applications for the Philips Wasabi Multiprocessor System
(June 2005),
[Msc Thesis]
![844_optimisation_of_multimedia_applications_for_the_philips_wasa.pdf](/images/pdf-a.png)