M. Lefter, G.R. Voicu, T. Marconi, V. Savin, S.D. Cotofana, LDPC-Based Adaptive Multi-Error Correction for 3D Memories (September 2017), 35th IEEE International Conference on Computer Design (ICCD 2017), 5-8 November 2017, Boston, USA [Conference Paper]

M. Lefter, T. Marconi, G.R. Voicu, S.D. Cotofana, Low Cost Multi-Error Correction for 3D Polyhedral Memories (July 2017), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2017), 25-26 July 2017, Newporrt, USA [Conference Paper]

G.R. Voicu, S.D. Cotofana, High-performance, Cost-effective 3D Stacked Wide-Operand Adders (August 2016), IEEE Transactions on Emerging Topics in Computing , DOI: 10.1109/TETC.2016.2598290 [Journal Paper]

M. Enachescu, M. Lefter, G.R. Voicu, S.D. Cotofana, Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory (July 2016), IEEE Transactions on Emerging Topics in Computing , DOI: 10.1109/TETC.2016.2588725 [Journal Paper]

M. Lefter, G.R. Voicu, S.D. Cotofana, A Shared Polyhedral Cache for 3D Wide-I/O Multi-Core Computing Platforms (May 2015), IEEE International Symposium on Circuits and Systems (ISCAS 2015), 24-27 May 2015, Lisbon, Portugal [Conference Paper]

M. Lefter, M. Enachescu, G.R. Voicu, S.D. Cotofana, Energy Effective 3D Stacked Hybrid NEMFET-CMOS Caches (July 2014), 10th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2014), 8-10 July 2014, Paris, France [Conference Paper]

G.R. Voicu, S.D. Cotofana, Towards Heterogenous 3D-Stacked Reliable Computing with von Neumann Multiplexing (July 2013), 9th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2013), July 15-17, 2013, New York City, USA [Conference Paper]

S. M. Alavi, G.R. Voicu, R. B. Staszewski, L. C. de Vreede, J.R. Long, A 2x13-bit All-Digital I/Q RF-DAC in 65-nm CMOS (June 2013), IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2013), 2-4 June 2013, Seattle, USA , Best Student Paper Award - 2nd Place [Conference Proceedings]

G.R. Voicu, M. Lefter, M. Enachescu, S.D. Cotofana, 3D Stacked Wide-Operand Adders: A Case Study (June 2013), 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2013), 5-7 June 2013, Washington D.C., USA [Conference Paper]

M. Lefter, G.R. Voicu, M. Taouil, M. Enachescu, S. Hamdioui, S.D. Cotofana, Is TSV-based 3D Integration Suitable for Inter-die Memory Repair? (March 2013), Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), 18-22 March 2013, Grenoble, France [Conference Paper]

G.R. Voicu, M. Enachescu, S.D. Cotofana, A 3D Stacked High Performance Scalable Architecture for 3D Fourier Transform (September 2012), 30th IEEE International Conference on Computer Design (ICCD 2012), 30 September - 3 October 2012, Montreal, Canada [Conference Paper]

S. Safiruddin, M. Lefter, D. Borodin, G.R. Voicu, S.D. Cotofana, Zero-Performance-Overhead Online Fault Detection and Diagnosis in 3D Stacked Integrated Circuits (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands [Conference Paper]

M. Enachescu, G.R. Voicu, S.D. Cotofana, Is the Road Towards "Zero-Energy" Paved with NEMFET-based Power Management? (May 2012), IEEE International Symposium on Circuits and Systems (ISCAS 2012), 20-23 May 2012, Seoul, Korea , Finalist for Best Paper Award for PhD Students [Conference Paper]

S. Safiruddin, D. Borodin, M. Lefter, G.R. Voicu, S.D. Cotofana, Is 3D Integration The Way to Future Dependable Computing Platforms? (May 2012), 13th International Conference on Optimization of Electrical and Electronic Equipment (OPTIM 2012), 24-26 May 2012, Brasov, Romania [Conference Paper]

M. Enachescu, G.R. Voicu, S.D. Cotofana, Leakage-enhanced 3D-Stacked NEMFET-based Power Management Architecture for Autonomous Sensors Systems (October 2011), 15th International Conference on System Theory, Control and Computing (ICSTCC 2011), 14-16 October 2011, Sinaia, Romania , Best Paper Award for PhD Students [Conference Paper]

K.A. Gbolagade, G.R. Voicu, S.D. Cotofana, An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1} (August 2011), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI), volume 19, issue 8 [Journal Paper]

G.R. Voicu, M. Enachescu, S.D. Cotofana, Towards "Zero-energy" using NEMFET-based Power Management for 3D Hybrid Stacked ICs (June 2011), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2011), 8-9 June 2011, San Diego, USA [Conference Paper]

M. Enachescu, G.R. Voicu, S.D. Cotofana, Advanced NEMS-based Power Management for 3D Stacked Integrated Circuits (December 2010), International Conference on Energy Aware Computing (ICEAC 2010), 16-18 December 2010, Cairo, Egypt [Conference Paper]

K.A. Gbolagade, G.R. Voicu, S.D. Cotofana, An Efficient FPGA Design of Reverse Converter for the Moduli Set {2n+2,2n+1,2n} (July 2010), 6th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2010), 11-17 July 2010, Terrassa, Spain [Conference Paper]

K.A. Gbolagade, G.R. Voicu, S.D. Cotofana, Memoryless RNS-to-Binary Converters for the moduli set {2n+1-1,2n,2n-1} (July 2010), 21st IEEE International Conference on Application Specific Systems Architectures, and Processors (ASAP 2010), 7-9 July 2010, Rennes, France [Conference Paper]