H. Pettenghi, S.D. Cotofana, L.A. Sousa, Efficient Method for Designing Modulo {2n ± k} Multipliers (January 2014), Journal of Circuits, Systems and Computers, volume 23, issue 1 [Journal Paper]

K.A. Gbolagade, R. Chaves, L.A. Sousa, S.D. Cotofana, An Improved Reverse Converter for the {2^{2n+1}-1, 2^{n}, 2^{n}-1} Moduli Set (June 2010), IEEE International Symposium on Circuits and Systems (ISCAS 2010), 30 May - 2 June 2010, Paris, France [Conference Paper]

K.A. Gbolagade, R. Chaves, L.A. Sousa, S.D. Cotofana, Residue-to-Binary Converters for the Moduli Set {2^{2n+1}-1, 2^{2n}, 2^{n}-1} (December 2009), 2nd International Conference On Adaptive Science & Technology (ICAST09), 14-16 December 2009, Accra, Ghana [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, On-the-fly Attestation of Reconfigurable Hardware (September 2008), 18th International Conference on Field Programmable Logic and Applications (FPL 2008), 8-10 September 2008, Heidelberg, Germany [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Cost-Efficient SHA Hardware Accelerators (August 2008), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI), volume 16, issue 8 [Journal Paper]

F. Pratas, G.N. Gaydadjiev, M. Berekovic, L.A. Sousa, S. Kaxiras, Low Power Microarchitecture with Instruction Reuse (May 2008), 5th Conference on Computing Frontiers (CF 2008), 5-7 May 2008, Ischia, Italy [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Merged Computation for Whirlpool Hashing (March 2008), Design, Automation and Test in Europe (DATE 2008), 10-14 March 2008, Munich, Germany [Conference Paper]

R. Chaves, B. Donchev, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, BRAM-LUT tradeoff on a Polymorphic DES Design (January 2008), 3rd International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2008), 27-29 January 2008, Göteborg, Sweden [Conference Paper]

C. van der Bok, R. Chaves, G.K. Kuzmanov, L.A. Sousa, A.J. van Genderen, Dynamic FPGA Reconfigurations with Run-Time Region Delimitation (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]

R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Reconfigurable Cryptographic Processor (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Improving SHA-2 Hardware Implementations (October 2006), 8th International Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006), 10-13 October 2006, Yokohama, Japan [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Rescheduling for Optimized SHA-1 Calculation (July 2006), 6th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2006), 17-20 July 2006, Samos, Greece [Conference Paper]

R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Reconfigurable Memory Based AES Co-Processor (April 2006), 13th Reconfigurable Architectures Workshop (RAW 2006), 25-26 April 2006, Rhodes Island, Greece [Conference Paper]

R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Polymorphic AES Encryption Implementation (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]

S. Vassiliadis, L.A. Sousa, G.N. Gaydadjiev, The Midlifekicker Microarchitecture Evaluation Metric (July 2005), 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece [Conference Paper]