R. Chaves

NameR. Chaves
First NameRicardo
E-mail
Author TypePhd Student
AffiliationTU Delft

Publications

K.A. Gbolagade, R. Chaves, L.A. Sousa, S.D. Cotofana, An Improved Reverse Converter for the {2^{2n+1}-1, 2^{n}, 2^{n}-1} Moduli Set 176_an_improved_reverse_converter_for_the_22n11_2n_2.pdf (June 2010), IEEE International Symposium on Circuits and Systems (ISCAS 2010), 30 May - 2 June 2010, Paris, France [Conference Paper]
K.A. Gbolagade, R. Chaves, L.A. Sousa, S.D. Cotofana, Residue-to-Binary Converters for the Moduli Set {2^{2n+1}-1, 2^{2n}, 2^{n}-1} 378_residuetobinary_converters_for_the_moduli_set_22n11.pdf (December 2009), 2nd International Conference On Adaptive Science & Technology (ICAST09), 14-16 December 2009, Accra, Ghana [Conference Paper]
R. Chaves, G.K. Kuzmanov, L.A. Sousa, On-the-fly Attestation of Reconfigurable Hardware 423_onthefly_attestation_of_reconfigurable_hardware.pdf (September 2008), 18th International Conference on Field Programmable Logic and Applications (FPL 2008), 8-10 September 2008, Heidelberg, Germany [Conference Paper]
R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Cost-Efficient SHA Hardware Accelerators 436_costefficient_sha_hardware_accelerators.pdf (August 2008), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI), volume 16, issue 8 [Journal Paper]
M. Pericàs, R. Chaves, G.N. Gaydadjiev, S. Vassiliadis, M. Valero, Vectorized AES core for high-throughput secure environments 470_vectorized_aes_core_for_highthroughput_secure_environments.pdf (June 2008), 8th International Conference on High Performance Computing for Computational Science (VECPAR 2008), 24-27 June 2008, Toulouse, France [Conference Paper]
R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Merged Computation for Whirlpool Hashing 495_merged_computation_for_whirlpool_hashing.pdf (March 2008), Design, Automation and Test in Europe (DATE 2008), 10-14 March 2008, Munich, Germany [Conference Paper]
R. Chaves, B. Donchev, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, BRAM-LUT tradeoff on a Polymorphic DES Design 553_bramlut_tradeoff_on_a_polymorphic_des_design.pdf (January 2008), 3rd International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2008), 27-29 January 2008, Göteborg, Sweden [Conference Paper]
R. Chaves, Secure Computing on Reconfigurable Systems 651_secure_computing_on_reconfigurable_systems.pdf (December 2007), [Phd Thesis]
C. van der Bok, R. Chaves, G.K. Kuzmanov, L.A. Sousa, A.J. van Genderen, Dynamic FPGA Reconfigurations with Run-Time Region Delimitation 672_dynamic_fpga_reconfigurations_with_runtime_region_delimitat.pdf (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]
M. Pericàs, M. Valero, R. Chaves, G.N. Gaydadjiev, S. Vassiliadis, Vectorized AES Core for High-Throughput Secure Environments 570_vectorized_aes_core_for_highthroughput_secure_environments.pdf (September 2007), "The Future of Computing" Symposium, 28 September 2007, Delft, The Netherlands [Conference Paper]
Y.D. Yankova, K.L.M. Bertels, S. Vassiliadis, G.K. Kuzmanov, R. Chaves, HLL-to-HDL Generation: Results and Challenges 783_hlltohdl_generation_results_and_challenges.pdf (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]
R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Reconfigurable Cryptographic Processor 791_reconfigurable_cryptographic_processor.pdf (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]
R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Improving SHA-2 Hardware Implementations 795_improving_sha2_hardware_implementations.pdf (October 2006), 8th International Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006), 10-13 October 2006, Yokohama, Japan [Conference Paper]
R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Rescheduling for Optimized SHA-1 Calculation 717_rescheduling_for_optimized_sha1_calculation.pdf (July 2006), 6th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2006), 17-20 July 2006, Samos, Greece [Conference Paper]
R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Reconfigurable Memory Based AES Co-Processor 751_reconfigurable_memory_based_aes_coprocessor.pdf (April 2006), 13th Reconfigurable Architectures Workshop (RAW 2006), 25-26 April 2006, Rhodes Island, Greece [Conference Paper]
R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Polymorphic AES Encryption Implementation 864_polymorphic_aes_encryption_implementation.pdf (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]