K.A. Gbolagade, R. Chaves, L.A. Sousa, S.D. Cotofana, An Improved Reverse Converter for the {2^{2n+1}-1, 2^{n}, 2^{n}-1} Moduli Set (June 2010), IEEE International Symposium on Circuits and Systems (ISCAS 2010), 30 May - 2 June 2010, Paris, France [Conference Paper]

K.A. Gbolagade, R. Chaves, L.A. Sousa, S.D. Cotofana, Residue-to-Binary Converters for the Moduli Set {2^{2n+1}-1, 2^{2n}, 2^{n}-1} (December 2009), 2nd International Conference On Adaptive Science & Technology (ICAST09), 14-16 December 2009, Accra, Ghana [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, On-the-fly Attestation of Reconfigurable Hardware (September 2008), 18th International Conference on Field Programmable Logic and Applications (FPL 2008), 8-10 September 2008, Heidelberg, Germany [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Cost-Efficient SHA Hardware Accelerators (August 2008), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI), volume 16, issue 8 [Journal Paper]

M. Pericàs, R. Chaves, G.N. Gaydadjiev, S. Vassiliadis, M. Valero, Vectorized AES core for high-throughput secure environments (June 2008), 8th International Conference on High Performance Computing for Computational Science (VECPAR 2008), 24-27 June 2008, Toulouse, France [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Merged Computation for Whirlpool Hashing (March 2008), Design, Automation and Test in Europe (DATE 2008), 10-14 March 2008, Munich, Germany [Conference Paper]

R. Chaves, B. Donchev, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, BRAM-LUT tradeoff on a Polymorphic DES Design (January 2008), 3rd International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2008), 27-29 January 2008, Göteborg, Sweden [Conference Paper]

R. Chaves, Secure Computing on Reconfigurable Systems (December 2007), [Phd Thesis]

C. van der Bok, R. Chaves, G.K. Kuzmanov, L.A. Sousa, A.J. van Genderen, Dynamic FPGA Reconfigurations with Run-Time Region Delimitation (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]

M. Pericàs, M. Valero, R. Chaves, G.N. Gaydadjiev, S. Vassiliadis, Vectorized AES Core for High-Throughput Secure Environments (September 2007), "The Future of Computing" Symposium, 28 September 2007, Delft, The Netherlands [Conference Paper]

R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Reconfigurable Cryptographic Processor (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]

Y.D. Yankova, K.L.M. Bertels, S. Vassiliadis, G.K. Kuzmanov, R. Chaves, HLL-to-HDL Generation: Results and Challenges (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Improving SHA-2 Hardware Implementations (October 2006), 8th International Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006), 10-13 October 2006, Yokohama, Japan [Conference Paper]

R. Chaves, G.K. Kuzmanov, L.A. Sousa, S. Vassiliadis, Rescheduling for Optimized SHA-1 Calculation (July 2006), 6th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2006), 17-20 July 2006, Samos, Greece [Conference Paper]

R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Reconfigurable Memory Based AES Co-Processor (April 2006), 13th Reconfigurable Architectures Workshop (RAW 2006), 25-26 April 2006, Rhodes Island, Greece [Conference Paper]

K.L.M. Bertels, S. Vassiliadis, E. Moscu Panainte, Y.D. Yankova, C. Galuzzi, R. Chaves, G.K. Kuzmanov, Developing applications for polymorphic processors: the Delft Workbench (January 2006), CE technical report [Technical Report]

R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L.A. Sousa, Polymorphic AES Encryption Implementation (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]