H. Corporaal

NameH. Corporaal
First NameHenk
E-mail
Author TypeExternal
AffiliationTU Eindhoven

Publications

S. Hamdioui, S Kvatinsky, G Cauwenberghs, L. Xie, N Wald, S Joshi, H Elsayed, H. Corporaal, K.L.M. Bertels, Memristor For Computing: Myth or Reality? (March 2017), Design, Automation and Test in Europe (DATE 2017), 27-31 March 2017, Lausanne, Switzerland [Conference Proceedings]
J. Yu, R. Nane, M.A.B. Haron, S. Hamdioui, H. Corporaal, K.L.M. Bertels, Skeleton-Based Design and Simulation Flow for Computation-In-Memory Architectures 1544_skeletonbased_design_and_simulation_flow_for_computationi.pdf (July 2016), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2016), 18-20 July 2016, Beijing, China , Best Student Paper Award [Conference Proceedings]
A.T. Nelson, A. Hansson, H. Corporaal, K.G.W. Goossens, Conservative Application-Level Performance Analysis through Simulation of MPSoCs 272_conservative_applicationlevel_performance_analysis_through.pdf (October 2010), 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia 2010), 28-29 October 2010, Scottsdale, USA [Conference Paper]
A.G.M. Cilio, H. Corporaal, Global Variable Promotion: Using Registers to Reduce Cache Power Dissipation 1122_global_variable_promotion_using_registers_to_reduce_cache.pdf (April 2002), 11th International Conference on Compiler Construction (CC 2002), 8-12 April 2002, Grenoble, France [Conference Paper]
S. Roos, H. Corporaal, R. Lamberts, Clustering on the Move 1163_clustering_on_the_move.pdf (April 2002), 4th International Conference on Massively Parallel Computing Systems (MPCS 2002), 10-12 April 2002, Ischia, Italy [Conference Paper]
A.G.M. Cilio, H. Corporaal, Code Positioning for VLIW Architectures 1192_code_positioning_for_vliw_architectures.pdf (June 2001), 9th International Conference and Exibition on High-Performance Computing and Networking (HPCN Europe 2001), 25-27 June 2001, Amsterdam, The Netherlands [Conference Paper]
T.D. Hamalainen, M. Hannikainen, P. Hamalainen, H. Corporaal, J. Saarinen, Implementation of encryption algorithms on transport triggered architectures 1201_implementation_of_encryption_algorithms_on_transport_trigge.pdf (May 2001), International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sidney, Australia [Conference Paper]
M. Arnold, H. Corporaal, Designing domain-specific processors (April 2001), 9th International Sympsium on Hardware/Software Codesign (CODES 2001), 25-27 April 2001, Copenhagen, Denmark [Conference Paper]
M. Stanca, H. Corporaal, S.D. Cotofana, S. Vassiliadis, Hashed Addressed Caches for Embedded Pointer Based Codes 1251_hashed_addressed_caches_for_embedded_pointer_based_codes.pdf (August 2000), 6th International Euro-Par Conference on Parallel Processing (Euro-Par 2000), 29 August - 1 September 2000, Munich, Germany [Conference Paper]
H.J.M. Schot, H. Corporaal, Automated design of an ASIP for image processing applications 1250_automated_design_of_an_asip_for_image_processing_applicatio.pdf (August 2000), 6th International Euro-Par Conference on Parallel Processing (Euro-Par 2000), 29 August - 1 September 2000, Munich, Germany [Conference Paper]
R. Manniesing, I. Karkowski, H. Corporaal, Automatic SIMD parallelization of embedded applications based on pattern recognition 1247_automatic_simd_parallelization_of_embedded_applications_bas.pdf (August 2000), 6th International Euro-Par Conference on Parallel Processing (Euro-Par 2000), 29 August - 1 September 2000, Munich, Germany [Conference Paper]
H. Corporaal, Embedded processor design using transport triggered architectures (June 2000), International Workshop on Spectral Transforms and Logic Design for Future Digital Systems (SPECLOG 2000), 2-3 June 2000, Tampere, Finland [Conference Paper]
A.G.M. Cilio, H. Corporaal, The Impact of Code Positioning on ILP Scheduling (June 2000), 6th Annual conference of the Advanced School for Computing and Imaging (ASCI 2000), 14-16 June 2000, Lommel, Belgium [Conference Paper]
A.G.M. Cilio, H. Corporaal, Link-time effective whole-program optimizations (March 2000), Future Generation Computer Systems (FGCS), volume 16, issue 5 [Journal Paper]
M. Stanca, H. Corporaal, S.D. Cotofana, S. Vassiliadis, Array Based Structure Loop Transformations for Cache Miss Reduction 1274_array_based_structure_loop_transformations_for_cache_miss_r.pdf (February 2000), 18th IASTED International Conference on Applied Informatics (AI 2000), 14-17 February 2000, Innsbruck, Austria [Conference Paper]