J. Yu, R. Nane, I. Ashraf, M. Taouil, S. Hamdioui, H. Corporaal, K.L.M. Bertels, Skeleton-based Synthesis Flow for Computation-In-Memory Architectures (October 2017), IEEE Transactions on Emerging Topics in Computing, volume PP, issue 99 , Pre-publish [Journal Paper]

H.A. Du Nguyen, L. Xie, M. Taouil, R. Nane, S. Hamdioui, K.L.M. Bertels, On the Implementation of Computation-in-Memory Parallel Adder (May 2017), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI) [Journal Paper]

J. Yu, T. Hogervorst, R. Nane, A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons (May 2017), 27th ACM Great Lakes Symposium on VLSI (GLSVLSI 2017), 10-12 May 2017, Banff, Canada [Conference Paper]

R. Nane, V.M. Sima, C. Pilato, J. Choi, B Fort, A Canis, Y.T. Chen, H Hsiao, S Brown, F. Ferrandi, J Anderson, K.L.M. Bertels, A Survey and Evaluation of FPGA High-Level Synthesis Tools (October 2016), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 35, issue 10 [Journal Paper]

D. Iorga, R. Nane, Y. Lu, E van Dalen, K.L.M. Bertels, An Image Processing VLIW Architecture for Real-Time Depth Detection (October 2016), 28th International Conference on Computer Architecture and High Performance Computing (SBAC-PAD 2016), 26-28 October 2016, Los Angeles, USA [Conference Paper]

J. Yu, R. Nane, M.A.B. Haron, S. Hamdioui, H. Corporaal, K.L.M. Bertels, Skeleton-Based Design and Simulation Flow for Computation-In-Memory Architectures (July 2016), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2016), 18-20 July 2016, Beijing, China , Best Student Paper Award [Conference Proceedings]

M.A.B. Haron, J. Yu, R. Nane, M. Taouil, S. Hamdioui, K.L.M. Bertels, Parallel Matrix Multiplication on Memristor-Based Computation-in-Memory Architecture (July 2016), International Conference on High Performance Computing & Simulation (HPCS 2016), 18-22 July 2016, Innsbruck, Austria , Outstanding Paper Runner-up Award [Conference Paper]

G. Nazarian, R. Nane, G.N. Gaydadjiev, Low-cost Software Control-Flow Error Recovery (August 2015), 18th Euromicro Conference on Digital Systems Design (DSD 2015), 26-28 August 2015, Funchal, Madeira (Portugal) [Conference Paper]

H.A. Du Nguyen, L. Xie, R. Nane, M. Taouil, S. Hamdioui, K.L.M. Bertels, Computation-In-Memory Based Parallel Adder (July 2015), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 15), 8-10 July 2015, Boston, USA [Conference Paper]

R. Nane, V.M. Sima, C. Pham-Quoc, F Goncalves, K.L.M. Bertels, High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain (August 2014), 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC 2014), 26-28 August 2014, Milan, Italy [Conference Paper]

R. Nane, Automatic Hardware Generation for Reconfigurable Architectures (April 2014), [Phd Thesis]

J.M.P. Cardoso, T. Carvalho, J G de F. Coutinho, R Nobre, R. Nane, P. Diniz, Z. Petrov, W. Luk, K.L.M. Bertels, Controlling a complete hardware synthesis toolchain with LARA aspects (November 2013), Microprocessors and Microsystems (MICPRO), volume 37, issue 8 [Journal Paper]

R Nobre, J.M.P. Cardoso, B Olivier, R. Nane, L Fitzpatrick, J G de F. Coutinho, J. van Someren, V.M. Sima, K.L.M. Bertels, P. Diniz, Hardware/Software Compilation (August 2013), Book Title "Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach", Published by Springer [Book Chapter]

R.J. Meeuws, S.A. Ostadzadeh, C. Galuzzi, V.M. Sima, R. Nane, K.L.M. Bertels, Quipu: A Statistical Modelling Approach for Predicting Hardware Resources (May 2013), ACM Transactions on Reconfigurable Technology and Systems (TRETS), volume 6, issue 1 [Journal Paper]

J G de F. Coutinho, J.M.P. Cardoso, T. Carvalho, R Nobre, S Bhattacharya, P. Diniz, L Fitzpatrick, R. Nane, Deriving resource efficient designs using the REFLECT aspect-oriented approach (extended abstract) (March 2013), 9th International Symposium on Applied Reconfigurable Computing (ARC 2013), 25-27 March 2013, Los Angeles, USA [Conference Paper]

R. Nane, V.M. Sima, K.L.M. Bertels, A Lightweight Speculative and Predicative Scheme for Hardware Execution (December 2012), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012), 5-7 December 2012, Cancun, Mexico [Conference Paper]

R. Nane, V.M. Sima, K.L.M. Bertels, Area Constraint Propagation in High Level Synthesis (December 2012), International Conference on Field-Programmable Technology (FPT 2012), 10-12 December 2012, Seoul, Korea [Conference Paper]

R. Nane, V.M. Sima, B Olivier, R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler (August 2012), 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), 29-31 August 2012, Oslo, Norway [Conference Paper]

R. Nane, S. van Haastregt, T.P. Stefanov, B. Kienhuis, V.M. Sima, K.L.M. Bertels, IP-XACT Extensions for Reconfigurable Computing (September 2011), 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2011), 11-14 September 2011, Santa Monica, USA [Conference Paper]

J.M.P. Cardoso, K.L.M. Bertels, G.K. Kuzmanov, R. Nane, V.M. Sima, REFLECT: Rendering FPGAs to Multi-core Embedded Computing (August 2011), Book Title "Reconfigurable Computing - From FPGAs to Hardware/Software Codesign", Published by Springer [Book Chapter]

J.M.P. Cardoso, R. Nane, P. Diniz, Z. Petrov, K Kratky, K.L.M. Bertels, M Hubner, F Goncalves, G. Coutinho, G Constantinides, B Olivier, W. Luk, J.A. Becker, G.K. Kuzmanov, A New Approach to Control and Guide the Mapping of Computations to FPGAs (July 2011), International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'11), 18-21 July 2011, Las Vegas, USA [Conference Paper]

R. Nane, V.M. Sima, J. van Someren, K.L.M. Bertels, DWARV: A HDL Compiler with Support for Scheduling Custom IP Blocks (June 2011), 48th Design Automation Conference (DAC 2011), 5-10 June 2011, San Diego, USA , WIP poster session [Conference Paper]

R. Nane, S. van Haastregt, T.P. Stefanov, B. Kienhuis, K.L.M. Bertels, An HdS Meta-Model Case Study: Integrating Orthogonal Computation Models (March 2011), Workshop DATE 2011 : Hardware Dependent Software (HdS) Solutions for SoC Design (DATE 2011 Workshop), 18 March 2011, Grenoble, France [Conference Paper]

R. Nane, K.L.M. Bertels, A Composable and Integrable Hardware Compiler for Automated Heterogeneous HW/SW co-design Tool-Chains (July 2010), 6th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2010), 11-17 July 2010, Terrassa, Spain [Conference Paper]

S. van Haastregt, R. Nane, B. Kienhuis, HdS Generation (October 2009), SS Workshop in Embedded Systems Week (ESWeek 2009 Workshop), 16 October 2009, Grenoble, France [Conference Paper]

R. Nane, K.L.M. Bertels, Scheduling in the Context of Automatic Hardware Generation (September 2008), 8th Architectures and Compilers for Embedded Systems Symposium (ACES 2008), 17-18 September 2008, Edegem, Belgium [Conference Paper]

R. Nane, An Agent Adaptability Framework (September 2007), [Msc Thesis]