R. Nane, V.M. Sima, B Olivier, R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler (August 2012), 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), 29-31 August 2012, Oslo, Norway [Conference Paper]

K.L.M. Bertels, V.M. Sima, Y.D. Yankova, G.K. Kuzmanov, W. Luk, G. Coutinho, F. Ferrandi, C. Pilato, M. Lattuada, D. Sciuto, A. Michelotti, hArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms (October 2010), IEEE Micro, volume 30, issue 5 , Special Issue on European Multicore Processing Projects [Journal Paper]

R.J. Meeuws, K. Sigdel, Y.D. Yankova, K.L.M. Bertels, High Level Quantitative Interconnect Estimation for Early Design Space Exploration (December 2008), International Conference on Field-Programmable Technology (ICFPT 2008), 7-10 December 2008, Taipei, Taiwan [Conference Paper]

R.J. Meeuws, K. Sigdel, Y.D. Yankova, K.L.M. Bertels, Quantitative Prediction for Early Design Space Exploration in Delft Workbench: An Outlook (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]

D. Theodoropoulos, Y.D. Yankova, G.K. Kuzmanov, K.L.M. Bertels, Automatic hardware generation for the Molen reconfigurable architecture: a G721 case study (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]

Y.D. Yankova, G.K. Kuzmanov, K.L.M. Bertels, G.N. Gaydadjiev, Y. Lu, S. Vassiliadis, DWARV: DelftWorkbench Automated Reconfigurable VHDL Generator (August 2007), 17th International Conference on Field Programmable Logic and Applications (FPL 2007), 27-29 August 2007, Amsterdam, The Netherlands [Conference Paper]

R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, G.N. Gaydadjiev, S. Vassiliadis, A Quantitative Prediction Model for Hardware/Software Partitioning (August 2007), 17th International Conference on Field Programmable Logic and Applications (FPL 2007), 27-29 August 2007, Amsterdam, The Netherlands [Conference Paper]

K.L.M. Bertels, G.K. Kuzmanov, E. Moscu Panainte, G.N. Gaydadjiev, Y.D. Yankova, V.M. Sima, K. Sigdel, R.J. Meeuws, S. Vassiliadis, Hartes Toolchain Early Evaluation: Profiling, Compilation and HDL Generation (August 2007), 17th International Conference on Field Programmable Logic and Applications (FPL 2007), 27-29 August 2007, Amsterdam, The Netherlands [Conference Paper]

Y.D. Yankova, K.L.M. Bertels, S. Vassiliadis, R.J. Meeuws, A.J.R. Virginia, Automated HDL Generation: Comparative Evaluation (May 2007), International Symposium on Circuits and Systems (ISCAS 2007), 27-30 May 2007, New Orleans, USA [Conference Paper]

K.L.M. Bertels, G.K. Kuzmanov, E. Moscu Panainte, G.N. Gaydadjiev, Y.D. Yankova, V.M. Sima, K. Sigdel, R.J. Meeuws, S. Vassiliadis, Profiling, Compilation, and HDL Generation within the hArtes Project (April 2007), Workshop on Directions in FPGAs and Reconfigurable Systems: Adaptive Heterogeneous Systems-on-Chip and European Dimensions (DATE 2007 Workshop), 16-20 April 2007, Nice, France [Conference Paper]

Y.D. Yankova, K.L.M. Bertels, S. Vassiliadis, G.K. Kuzmanov, R. Chaves, HLL-to-HDL Generation: Results and Challenges (November 2006), 17th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), 23-24 November 2006, Veldhoven, The Netherlands [Conference Paper]

C. Galuzzi, E. Moscu Panainte, Y.D. Yankova, K.L.M. Bertels, S. Vassiliadis, Automatic Selection of Application-Specific Instruction-Set Extensions (October 2006), 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2006), 22-25 October 2006, Seoul, Korea [Conference Paper]

R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, Towards A Quantitative Model for Hardware/Software Partitioning (April 2006), CE technical report , part of Rcosy DES.6392 project [Technical Report]

K.L.M. Bertels, S. Vassiliadis, E. Moscu Panainte, Y.D. Yankova, C. Galuzzi, R. Chaves, G.K. Kuzmanov, Developing applications for polymorphic processors: the Delft Workbench (January 2006), CE technical report [Technical Report]