T. Marconi

NameT. Marconi
First NameThomas
E-mailT.Marconi@tudelft.nl
Author TypePostDoc
AffiliationTU Delft

Publications

M. Lefter, G.R. Voicu, T. Marconi, V. Savin, S.D. Cotofana, LDPC-Based Adaptive Multi-Error Correction for 3D Memories 1641_ldpcbased_adaptive_multierror_correction_for_3d_memories.pdf (September 2017), 35th IEEE International Conference on Computer Design (ICCD 2017), 5-8 November 2017, Boston, USA [Conference Paper]
M. Lefter, T. Marconi, G.R. Voicu, S.D. Cotofana, Low Cost Multi-Error Correction for 3D Polyhedral Memories 1640_low_cost_multierror_correction_for_3d_polyhedral_memories.pdf (July 2017), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2017), 25-26 July 2017, Newporrt, USA [Conference Paper]
T. Marconi, C. Spagnol, E. Popovici, S.D. Cotofana, Transmission Channel Noise Aware Energy Effective LDPC Decoding 1508_transmission_channel_noise_aware_energy_effective_ldpc_deco.pdf (October 2015), Book Title "VLSI-SoC: Internet of Things Foundations", Published by Springer International Publishing [Book Chapter]
T. Marconi, S.D. Cotofana, Dynamic Bitstream Length Scaling Energy Effective Stochastic LDPC Decoding 1486_dynamic_bitstream_length_scaling_energy_effective_stochasti.pdf (May 2015), ACM Great Lakes VLSI Symposium (GLSVLSI 2015), 20-22 May 2015, Pittsburgh, USA [Conference Paper]
T. Marconi, C. Spagnol, E. Popovici, S.D. Cotofana, Towards Energy Effective LDPC Decoding by Exploiting Channel Noise Variability 1442_towards_energy_effective_ldpc_decoding_by_exploiting_channe.pdf (October 2014), 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2014), 6-8 October 2014, Playa del Carmen, Mexico [Conference Paper]
T. Marconi, K.L.M. Bertels, G.N. Gaydadjiev, A Novel Productivity-Driven Logic Element for Field-Programmable Devices 1343_a_novel_productivitydriven_logic_element_for_fieldprogram.pdf (July 2013), International Journal of Electronics (IJE) [Journal Paper]
T. Marconi, D. Theodoropoulos, K.L.M. Bertels, G.N. Gaydadjiev, A Novel HDL Coding Style to Reduce Power Consumption for Reconfigurable Devices 226_a_novel_hdl_coding_style_to_reduce_power_consumption_for_rec.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
T. Marconi, J.Y. Hur, K.L.M. Bertels, G.N. Gaydadjiev, A Novel Configuration Circuit Architecture to Speedup Reconfiguration and Relocation for Partially Reconfigurable Devices 179_a_novel_configuration_circuit_architecture_to_speedup_reconf.pdf (June 2010), IEEE 8th Symposium on Application Specific Processors (SASP 2010), 13-14 June 2010, Anaheim, USA [Conference Paper]
Y. Lu, T. Marconi, K.L.M. Bertels, G.N. Gaydadjiev, A Communication Aware Online Task Scheduling Algorithm for FPGA-based Partially Reconfigurable Systems 189_a_communication_aware_online_task_scheduling_algorithm_for_f.pdf (May 2010), 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2010), 2-4 May 2010, Charlotte, USA [Conference Paper]
T. Marconi, Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, 3D Compaction: a Novel Blocking-aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices 206_3d_compaction_a_novel_blockingaware_algorithm_for_online_h.pdf (March 2010), 6th International Symposium on Applied Reconfigurable Computing (ARC 2010), 17-19 March 2010, Bangkok, Thailand [Conference Paper]
T. Marconi, K.L.M. Bertels, G.N. Gaydadjiev, A Novel Logic Element for Power Reduction in FPDs 280_a_novel_logic_element_for_power_reduction_in_fpds.pdf (January 2010), Technical Report, Computer Engineering Lab [Technical Report]
T. Marconi, D. Theodoropoulos, K.L.M. Bertels, G.N. Gaydadjiev, A Novel HDL Coding Style for Power Reduction in FPGAs 281_a_novel_hdl_coding_style_for_power_reduction_in_fpgas.pdf (January 2010), Technical Report, Computer Engineering Lab [Technical Report]
T. Marconi, Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, A Novel Fast Online Placement Algorithm on 2D Partially Reconfigurable Devices 371_a_novel_fast_online_placement_algorithm_on_2d_partially_reco.pdf (December 2009), International Conference on Field-Programmable Technology (FPT 2009), 9-11 December 2009, Sidney, Australia [Conference Paper]
Z. Nawaz, T. Marconi, T.P. Stefanov, K.L.M. Bertels, Optimal pipeline design for Recursive Variable Expansion 322_optimal_pipeline_design_for_recursive_variable_expansion.pdf (July 2009), 5th International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2009), 12-18 July 2009, Terrassa, Spain [Conference Paper]
Z. Nawaz, T. Marconi, T.P. Stefanov, K.L.M. Bertels, Flexible Pipelining Design for Recursive Variable Expansion 336_flexible_pipelining_design_for_recursive_variable_expansion.pdf (May 2009), 23rd IEEE International Symposium on Parallel and Distributed Processing (IPDPS 2009), 23-29 May 2009, Rome, Italy [Conference Paper]
Y. Lu, T. Marconi, K.L.M. Bertels, G.N. Gaydadjiev, Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems 362_online_task_scheduling_for_the_fpgabased_partially_reconfig.pdf (March 2009), 5th International Workshop on Applied Reconfigurable Computing: Architectures, Tools and Applications (ARC 2009), 16-18 March 2009, Karlsruhe, Germany [Conference Paper]
Y. Lu, T. Marconi, G.N. Gaydadjiev, K.L.M. Bertels, R.J. Meeuws, A Self-adaptive on-line Task Placement Algorithm for Partially Reconfigurable Systems 489_a_selfadaptive_online_task_placement_algorithm_for_partial.pdf (April 2008), 22nd IEEE International Symposium on Parallel and Distributed Processing (IPDPS 2008), 14-18 April 2008, Miami, USA [Conference Paper]
Y. Lu, T. Marconi, G.N. Gaydadjiev, K.L.M. Bertels, An Efficient Algorithm for Free Resources Management on the FPGA 493_an_efficient_algorithm_for_free_resources_management_on_the.pdf (March 2008), Design, Automation and Test in Europe (DATE 2008), 10-14 March 2008, Munich, Germany [Conference Paper]
T. Marconi, Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, Intelligent Merging Online Task Placement Algorithm for Partial Reconfigurable Systems 492_intelligent_merging_online_task_placement_algorithm_for_part.pdf (March 2008), Design, Automation and Test in Europe (DATE 2008), 10-14 March 2008, Munich, Germany [Conference Paper]
T. Marconi, Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, Online Hardware Task Scheduling and Placement Algorithm on Partially Reconfigurable Devices 498_online_hardware_task_scheduling_and_placement_algorithm_on_p.pdf (March 2008), 4th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications (ARC 2008), 26-28 March 2008, London, UK [Conference Paper]
Z. Nawaz, O.S. Dragomir, T. Marconi, E. Moscu Panainte, K.L.M. Bertels, S. Vassiliadis, Recursive Variable Expansion: A Loop Transformation for Reconfigurable Systems 644_recursive_variable_expansion_a_loop_transformation_for_reco.pdf (December 2007), International Conference on Field-Programmable Technology (ICFPT 2007), 12-14 December 2007, Kokurakita, Japan [Conference Paper]
Y. Lu, T. Marconi, G.N. Gaydadjiev, K.L.M. Bertels, A new model of placement quality measurement for online task placement 664_a_new_model_of_placement_quality_measurement_for_online_task.pdf (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]