V.M. Sima

NameV.M. Sima
First NameVlad
E-mailV.M.Sima@tudelft.nl
Author TypePostDoc
AffiliationTU Delft

Publications

E.J. Houtgast, V.M. Sima, G. Marchiori, K.L.M. Bertels, Z. Al-Ars, Power-Efficiency Analysis of Accelerated BWA-MEM Implementations on Heterogeneous Computing Platforms 1549_powerefficiency_analysis_of_accelerated_bwamem_implementa.pdf (to appear: December 2016), International Conference on Reconfigurable Computing and FPGAs (ReConFig 2016), 30 November - 2 December 2016, Cancun, Mexico , full paper [Conference Paper]
R. Nane, V.M. Sima, C. Pilato, J. Choi, B Fort, A Canis, Y.T. Chen, H Hsiao, S Brown, F. Ferrandi, J Anderson, K.L.M. Bertels, A Survey and Evaluation of FPGA High-Level Synthesis Tools 1524_a_survey_and_evaluation_of_fpga_highlevel_synthesis_tools.pdf (October 2016), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 35, issue 10 [Journal Paper]
E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, Computational Challenges of Next Generation Sequencing Pipelines Using Heterogeneous Systems 1535_computational_challenges_of_next_generation_sequencing_pipe.pdf (July 2016), 12th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2016), 10-16 July 2016, Fiuggi, Italy , abstract only [Conference Proceedings]
E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, An Efficient GPU-Accelerated Implementation of Genomic Short Read Mapping with BWA-MEM 1536_an_efficient_gpuaccelerated_implementation_of_genomic_shor.pdf (July 2016), International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2016), 25-27 July 2016, Hong Kong, China , full paper [Conference Paper]
E.J. Houtgast, V.M. Sima, G. Marchiori, K.L.M. Bertels, Z. Al-Ars, Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms 1531_powerefficient_accelerated_genomic_short_read_mapping_on_h.pdf (May 2016), 24th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016), 1-3 May 2016, Washington DC, USA , abstract only [Conference Paper]
E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing 1520_gpuaccelerated_bwamem_genomic_mapping_algorithm_using_ada.pdf (April 2016), 29th International Conference on Architecture of Computing Systems (ARCS 2016), 4-7 April 2016, Nuremberg, Germany [Conference Paper]
S. Ren, V.M. Sima, Z. Al-Ars, FPGA Acceleration of the Pair-HMMs Forward Algorithm for DNA Sequence Analysis 1525_fpga_acceleration_of_the_pairhmms_forward_algorithm_for_dn.pdf (November 2015), International Workshop on High Performance Computing on Bioinformatics (HPCB 2015), 9-12 November 2015, Washington DC, USA [Conference Paper]
N. Ahmed, V.M. Sima, E.J. Houtgast, K.L.M. Bertels, Z. Al-Ars, Heterogeneous Hardware/Software Acceleration of the BWA-MEM DNA Alignment Algorithm 1500_heterogeneous_hardwaresoftware_acceleration_of_the_bwamem.pdf (November 2015), International Conference On Computer Aided Design (ICCAD 2015), 2-6 November 2015, Austin, USA [Conference Paper]
E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, An FPGA-Based Systolic Array to Accelerate the BWA-MEM Genomic Mapping Algorithm 1499_an_fpgabased_systolic_array_to_accelerate_the_bwamem_geno.pdf (September 2015), International Conference On Embedded Computer Systems: Architectures, Modeling, And Simulation (SAMOS XV (2015)), 20-23 July 2015, Samos, Greece [Conference Paper]
I. Ashraf, V.M. Sima, K.L.M. Bertels, Intra-Application Data-Communication Characterization 1488_intraapplication_datacommunication_characterization.pdf (July 2015), 1st International Workshop on Communication Architectures at Extreme Scale (ExaComm 2015), 16 July 2015, Frankfurt, Germany [Conference Paper]
M. de Jong, V.M. Sima, K.L.M. Bertels, D. Thomas, FPGA-accelerated Monte-Carlo integration using stratified sampling and Brownian bridges 1459_fpgaaccelerated_montecarlo_integration_using_stratified_s.pdf (December 2014), International Conference on Field Programmable Technology (FPT 2014), 10-12 December 2014, Shanghai, China [Conference Proceedings]
M. de Jong, V.M. Sima, K.L.M. Bertels, D. Thomas, FPGA-accelerated Monte-Carlo integration using stratified sampling and Brownian bridges 1542_fpgaaccelerated_montecarlo_integration_using_stratified_s.pdf (December 2014), International Conference on Field Programmable Technology (FPT 2014), 10-12 December 2014, Shanghai, China [Conference Paper]
I. Ashraf, V.M. Sima, K.L.M. Bertels, MCProf: Memory and Communication Profiler (November 2014), Technical Report, Computer Engineering Lab [Technical Report]
R. Nane, V.M. Sima, C. Pham-Quoc, F Goncalves, K.L.M. Bertels, High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain 1439_highlevel_synthesis_in_the_delft_workbench_hardwaresoftwa.pdf (August 2014), 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC 2014), 26-28 August 2014, Milan, Italy [Conference Paper]
R Nobre, J.M.P. Cardoso, B Olivier, R. Nane, L Fitzpatrick, J G de F. Coutinho, J. van Someren, V.M. Sima, K.L.M. Bertels, P. Diniz, Hardware/Software Compilation (August 2013), Book Title "Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach", Published by Springer [Book Chapter]
R.J. Meeuws, S.A. Ostadzadeh, C. Galuzzi, V.M. Sima, R. Nane, K.L.M. Bertels, Quipu: A Statistical Modelling Approach for Predicting Hardware Resources 1351_quipu_a_statistical_modelling_approach_for_predicting_hard.pdf (May 2013), ACM Transactions on Reconfigurable Technology and Systems (TRETS), volume 6, issue 1 [Journal Paper]
R. Nane, V.M. Sima, K.L.M. Bertels, Area Constraint Propagation in High Level Synthesis 601_area_constraint_propagation_in_high_level_synthesis.pdf (December 2012), International Conference on Field-Programmable Technology (FPT 2012), 10-12 December 2012, Seoul, Korea [Conference Paper]
R. Nane, V.M. Sima, K.L.M. Bertels, A Lightweight Speculative and Predicative Scheme for Hardware Execution 1312_a_lightweight_speculative_and_predicative_scheme_for_hardwa.pdf (December 2012), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012), 5-7 December 2012, Cancun, Mexico [Conference Paper]
R. Nane, V.M. Sima, B Olivier, R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler 600_dwarv_20_a_cosybased_ctovhdl_hardware_compiler.pdf (August 2012), 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), 29-31 August 2012, Oslo, Norway [Conference Paper]
G. Mariani, V.M. Sima, G. Palermo, V. Zaccaria, C. Silvano, K.L.M. Bertels, Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures 128_using_multiobjective_design_space_exploration_to_enable_run.pdf (March 2012), Design, Automation & Test in Europe Conference & Exhibition (DATE 2012), 12-16 March 2012, Dresden, Germany [Conference Paper]
V.M. Sima, Compiler Assisted Runtime Adaptation 1357_compiler_assisted_runtime_adaptation.pdf (January 2012), [Phd Thesis]
R. Nane, S. van Haastregt, T.P. Stefanov, B. Kienhuis, V.M. Sima, K.L.M. Bertels, IP-XACT Extensions for Reconfigurable Computing 8_ipxact_extensions_for_reconfigurable_computing.pdf (September 2011), 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2011), 11-14 September 2011, Santa Monica, USA [Conference Paper]
J.M.P. Cardoso, K.L.M. Bertels, G.K. Kuzmanov, R. Nane, V.M. Sima, REFLECT: Rendering FPGAs to Multi-core Embedded Computing (August 2011), Book Title "Reconfigurable Computing - From FPGAs to Hardware/Software Codesign", Published by Springer [Book Chapter]
G.K. Kuzmanov, V.M. Sima, K.L.M. Bertels, G. Coutinho, W. Luk, G. Marchiori, R. Tripiccione, F. Ferrandi, hArtes: Holistic Approach to Reconfigurable Real-Time Embedded Systems (August 2011), Book Title "Reconfigurable Computing - From FPGAs to Hardware/Software Codesign", Published by Springer [Book Chapter]
R. Nane, V.M. Sima, J. van Someren, K.L.M. Bertels, DWARV: A HDL Compiler with Support for Scheduling Custom IP Blocks 737_dwarv_a_hdl_compiler_with_support_for_scheduling_custom_ip.pdf (June 2011), 48th Design Automation Conference (DAC 2011), 5-10 June 2011, San Diego, USA , WIP poster session [Conference Paper]
S. Cechi, A. Primavera, F. Piazza, F. Bettarelli, E. Ciavattini, R. Toppi, G. Coutinho, W. Luk, V.M. Sima, K.L.M. Bertels, The hArtes CarLab: A new approach to advanced algorithms development for automotive audio (November 2010), 129th AES (Audio Engineering Society) Convention (AES), 4-7 November 2010, San Fransisco, USA [Conference Paper]
K.L.M. Bertels, V.M. Sima, Y.D. Yankova, G.K. Kuzmanov, W. Luk, G. Coutinho, F. Ferrandi, C. Pilato, M. Lattuada, D. Sciuto, A. Michelotti, hArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms 262_hartes_hardwaresoftware_codesign_for_heterogeneous_multico.pdf (October 2010), IEEE Micro, volume 30, issue 5 , Special Issue on European Multicore Processing Projects [Journal Paper]
V.M. Sima, K.L.M. Bertels, Runtime memory allocation in a heterogeneous reconfigurable platform 375_runtime_memory_allocation_in_a_heterogeneous_reconfigurable.pdf (December 2009), International Conference on Reconfigurable Computing and FPGAs (ReConFig 2009), 9-11 December 2009, Cancun, Mexico [Conference Paper]
M. Sabeghi, V.M. Sima, K.L.M. Bertels, Compiler Assisted Runtime Task Scheduling on a Reconfigurable Computer 295_compiler_assisted_runtime_task_scheduling_on_a_reconfigurabl.pdf (August 2009), 19th International Conference on Field Programmable Logic and Applications (FPL 2009), 31 August - 2 September 2009, Prague, Czech Republic [Conference Paper]
V.M. Sima, K.L.M. Bertels, Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform 343_runtime_decision_of_hardware_or_software_execution_on_a_hete.pdf (May 2009), 16th Reconfigurable Architectures Workshop (RAW 2009), 25-26 May 2009, Rome, Italy [Conference Paper]
V.M. Sima, K.L.M. Bertels, Compiler and OpenMP framework to allow dynamic hardware allocation on reconfigurable platforms 523_compiler_and_openmp_framework_to_allow_dynamic_hardware_allo.pdf (November 2008), 19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands [Conference Paper]
V.M. Sima, E. Moscu Panainte, K.L.M. Bertels, Resource Allocation Algorithm And OpenMP Extensions For Parallel Execution On A Heterogeneous Reconfigurable Platform 430_resource_allocation_algorithm_and_openmp_extensions_for_para.pdf (September 2008), 18th International Conference on Field Programmable Logic and Applications (FPL 2008), 8-10 September 2008, Heidelberg, Germany [Conference Paper]
V.M. Sima, E. Moscu Panainte, K.L.M. Bertels, FPGA area allocation for parallel C applications 683_fpga_area_allocation_for_parallel_c_applications.pdf (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]
V.M. Sima, E. Moscu Panainte, K.L.M. Bertels, Area allocation on reconfigurable hardware for parallel C applications (September 2007), 7th Architectures and Compilers for Embedded Systems Symposium (ACES 2007), 17-18 September 2007, Edegem, Belgium [Conference Paper]
K.L.M. Bertels, G.K. Kuzmanov, E. Moscu Panainte, G.N. Gaydadjiev, Y.D. Yankova, V.M. Sima, K. Sigdel, R.J. Meeuws, S. Vassiliadis, Hartes Toolchain Early Evaluation: Profiling, Compilation and HDL Generation 583_hartes_toolchain_early_evaluation_profiling_compilation_an.pdf (August 2007), 17th International Conference on Field Programmable Logic and Applications (FPL 2007), 27-29 August 2007, Amsterdam, The Netherlands [Conference Paper]
K.L.M. Bertels, G.K. Kuzmanov, E. Moscu Panainte, G.N. Gaydadjiev, Y.D. Yankova, V.M. Sima, K. Sigdel, R.J. Meeuws, S. Vassiliadis, Profiling, Compilation, and HDL Generation within the hArtes Project 625_profiling_compilation_and_hdl_generation_within_the_hartes.pdf (April 2007), Workshop on Directions in FPGAs and Reconfigurable Systems: Adaptive Heterogeneous Systems-on-Chip and European Dimensions (DATE 2007 Workshop), 16-20 April 2007, Nice, France [Conference Paper]