E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, Comparative Analysis of System-Level Acceleration Techniques in Bioinformatics: A Case Study of Accelerating the Smith-Waterman Algorithm for BWA-MEM (October 2018), 18th IEEE International Conference on BioInformatics and BioEngineering (BIBE 2018), 29-31 October 2018, Taichung, Taiwan [Conference Paper]

E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, Hardware Acceleration of BWA-MEM Genomic Short Read Mapping for Longer Read Lengths (August 2018), Computational Biology and Chemistry (Comput. Biol. Chem), volume 75 [Journal Paper]

E.J. Houtgast, V.M. Sima, Z. Al-Ars, High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL (October 2017), 17th annual IEEE International Conference on BioInformatics and BioEngineering (BIBE 2017), 23-25 October 2017, Washington DC, USA , full paper [Conference Paper]

E.J. Houtgast, V.M. Sima, G. Marchiori, K.L.M. Bertels, Z. Al-Ars, Power-Efficiency Analysis of Accelerated BWA-MEM Implementations on Heterogeneous Computing Platforms (December 2016), International Conference on Reconfigurable Computing and FPGAs (ReConFig 2016), 30 November - 2 December 2016, Cancun, Mexico , full paper [Conference Paper]

R. Nane, V.M. Sima, C. Pilato, J. Choi, B Fort, A Canis, Y.T. Chen, H Hsiao, S Brown, F. Ferrandi, J Anderson, K.L.M. Bertels, A Survey and Evaluation of FPGA High-Level Synthesis Tools (October 2016), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 35, issue 10 [Journal Paper]

E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, An Efficient GPU-Accelerated Implementation of Genomic Short Read Mapping with BWA-MEM (July 2016), International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2016), 25-27 July 2016, Hong Kong, China , Proceedings published in ACM SIGARCH Computer Architecture News (journal) [Conference Paper]

E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, Computational Challenges of Next Generation Sequencing Pipelines Using Heterogeneous Systems (July 2016), 12th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2016), 10-16 July 2016, Fiuggi, Italy , abstract only [Conference Proceedings]

E.J. Houtgast, V.M. Sima, G. Marchiori, K.L.M. Bertels, Z. Al-Ars, Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms (May 2016), 24th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016), 1-3 May 2016, Washington DC, USA , abstract only [Conference Paper]

E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing (April 2016), 29th International Conference on Architecture of Computing Systems (ARCS 2016), 4-7 April 2016, Nuremberg, Germany [Conference Paper]

N. Ahmed, V.M. Sima, E.J. Houtgast, K.L.M. Bertels, Z. Al-Ars, Heterogeneous Hardware/Software Acceleration of the BWA-MEM DNA Alignment Algorithm (November 2015), International Conference On Computer Aided Design (ICCAD 2015), 2-6 November 2015, Austin, USA [Conference Paper]

S. Ren, V.M. Sima, Z. Al-Ars, FPGA Acceleration of the Pair-HMMs Forward Algorithm for DNA Sequence Analysis (November 2015), International Workshop on High Performance Computing on Bioinformatics (HPCB 2015), 9-12 November 2015, Washington DC, USA [Conference Paper]

E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, An FPGA-Based Systolic Array to Accelerate the BWA-MEM Genomic Mapping Algorithm (September 2015), International Conference On Embedded Computer Systems: Architectures, Modeling, And Simulation (SAMOS XV (2015)), 20-23 July 2015, Samos, Greece [Conference Paper]

I. Ashraf, V.M. Sima, K.L.M. Bertels, Intra-Application Data-Communication Characterization (July 2015), 1st International Workshop on Communication Architectures at Extreme Scale (ExaComm 2015), 16 July 2015, Frankfurt, Germany [Conference Paper]

M. de Jong, V.M. Sima, K.L.M. Bertels, D. Thomas, FPGA-accelerated Monte-Carlo integration using stratified sampling and Brownian bridges (December 2014), International Conference on Field Programmable Technology (FPT 2014), 10-12 December 2014, Shanghai, China [Conference Paper]

I. Ashraf, V.M. Sima, K.L.M. Bertels, MCProf: Memory and Communication Profiler (November 2014), Technical Report, Computer Engineering Lab [Technical Report]

R. Nane, V.M. Sima, C. Pham-Quoc, F Goncalves, K.L.M. Bertels, High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain (August 2014), 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC 2014), 26-28 August 2014, Milan, Italy [Conference Paper]

R Nobre, J.M.P. Cardoso, B Olivier, R. Nane, L Fitzpatrick, J G de F. Coutinho, J. van Someren, V.M. Sima, K.L.M. Bertels, P. Diniz, Hardware/Software Compilation (August 2013), Book Title "Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach", Published by Springer [Book Chapter]

R.J. Meeuws, S.A. Ostadzadeh, C. Galuzzi, V.M. Sima, R. Nane, K.L.M. Bertels, Quipu: A Statistical Modelling Approach for Predicting Hardware Resources (May 2013), ACM Transactions on Reconfigurable Technology and Systems (TRETS), volume 6, issue 1 [Journal Paper]

R. Nane, V.M. Sima, K.L.M. Bertels, A Lightweight Speculative and Predicative Scheme for Hardware Execution (December 2012), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012), 5-7 December 2012, Cancun, Mexico [Conference Paper]

R. Nane, V.M. Sima, K.L.M. Bertels, Area Constraint Propagation in High Level Synthesis (December 2012), International Conference on Field-Programmable Technology (FPT 2012), 10-12 December 2012, Seoul, Korea [Conference Paper]

R. Nane, V.M. Sima, B Olivier, R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler (August 2012), 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), 29-31 August 2012, Oslo, Norway [Conference Paper]

G. Mariani, V.M. Sima, G. Palermo, V. Zaccaria, C. Silvano, K.L.M. Bertels, Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures (March 2012), Design, Automation & Test in Europe Conference & Exhibition (DATE 2012), 12-16 March 2012, Dresden, Germany [Conference Paper]

V.M. Sima, Compiler Assisted Runtime Adaptation (January 2012), [Phd Thesis]

R. Nane, S. van Haastregt, T.P. Stefanov, B. Kienhuis, V.M. Sima, K.L.M. Bertels, IP-XACT Extensions for Reconfigurable Computing (September 2011), 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2011), 11-14 September 2011, Santa Monica, USA [Conference Paper]

J.M.P. Cardoso, K.L.M. Bertels, G.K. Kuzmanov, R. Nane, V.M. Sima, REFLECT: Rendering FPGAs to Multi-core Embedded Computing (August 2011), Book Title "Reconfigurable Computing - From FPGAs to Hardware/Software Codesign", Published by Springer [Book Chapter]

G.K. Kuzmanov, V.M. Sima, K.L.M. Bertels, G. Coutinho, W. Luk, G. Marchiori, R. Tripiccione, F. Ferrandi, hArtes: Holistic Approach to Reconfigurable Real-Time Embedded Systems (August 2011), Book Title "Reconfigurable Computing - From FPGAs to Hardware/Software Codesign", Published by Springer [Book Chapter]

R. Nane, V.M. Sima, J. van Someren, K.L.M. Bertels, DWARV: A HDL Compiler with Support for Scheduling Custom IP Blocks (June 2011), 48th Design Automation Conference (DAC 2011), 5-10 June 2011, San Diego, USA , WIP poster session [Conference Paper]

S. Cechi, A. Primavera, F. Piazza, F. Bettarelli, E. Ciavattini, R. Toppi, G. Coutinho, W. Luk, V.M. Sima, K.L.M. Bertels, The hArtes CarLab: A new approach to advanced algorithms development for automotive audio (November 2010), 129th AES (Audio Engineering Society) Convention (AES), 4-7 November 2010, San Fransisco, USA [Conference Paper]

K.L.M. Bertels, V.M. Sima, Y.D. Yankova, G.K. Kuzmanov, W. Luk, G. Coutinho, F. Ferrandi, C. Pilato, M. Lattuada, D. Sciuto, A. Michelotti, hArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms (October 2010), IEEE Micro, volume 30, issue 5 , Special Issue on European Multicore Processing Projects [Journal Paper]

V.M. Sima, K.L.M. Bertels, Runtime memory allocation in a heterogeneous reconfigurable platform (December 2009), International Conference on Reconfigurable Computing and FPGAs (ReConFig 2009), 9-11 December 2009, Cancun, Mexico [Conference Paper]

M. Sabeghi, V.M. Sima, K.L.M. Bertels, Compiler Assisted Runtime Task Scheduling on a Reconfigurable Computer (August 2009), 19th International Conference on Field Programmable Logic and Applications (FPL 2009), 31 August - 2 September 2009, Prague, Czech Republic [Conference Paper]

V.M. Sima, K.L.M. Bertels, Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform (May 2009), 16th Reconfigurable Architectures Workshop (RAW 2009), 25-26 May 2009, Rome, Italy [Conference Paper]

V.M. Sima, K.L.M. Bertels, Compiler and OpenMP framework to allow dynamic hardware allocation on reconfigurable platforms (November 2008), 19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands [Conference Paper]

V.M. Sima, E. Moscu Panainte, K.L.M. Bertels, Resource Allocation Algorithm And OpenMP Extensions For Parallel Execution On A Heterogeneous Reconfigurable Platform (September 2008), 18th International Conference on Field Programmable Logic and Applications (FPL 2008), 8-10 September 2008, Heidelberg, Germany [Conference Paper]

V.M. Sima, E. Moscu Panainte, K.L.M. Bertels, FPGA area allocation for parallel C applications (November 2007), 18th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2007), 29-30 November 2007, Veldhoven, The Netherlands [Conference Paper]

V.M. Sima, E. Moscu Panainte, K.L.M. Bertels, Area allocation on reconfigurable hardware for parallel C applications (September 2007), 7th Architectures and Compilers for Embedded Systems Symposium (ACES 2007), 17-18 September 2007, Edegem, Belgium [Conference Paper]

K.L.M. Bertels, G.K. Kuzmanov, E. Moscu Panainte, G.N. Gaydadjiev, Y.D. Yankova, V.M. Sima, K. Sigdel, R.J. Meeuws, S. Vassiliadis, Hartes Toolchain Early Evaluation: Profiling, Compilation and HDL Generation (August 2007), 17th International Conference on Field Programmable Logic and Applications (FPL 2007), 27-29 August 2007, Amsterdam, The Netherlands [Conference Paper]

K.L.M. Bertels, G.K. Kuzmanov, E. Moscu Panainte, G.N. Gaydadjiev, Y.D. Yankova, V.M. Sima, K. Sigdel, R.J. Meeuws, S. Vassiliadis, Profiling, Compilation, and HDL Generation within the hArtes Project (April 2007), Workshop on Directions in FPGAs and Reconfigurable Systems: Adaptive Heterogeneous Systems-on-Chip and European Dimensions (DATE 2007 Workshop), 16-20 April 2007, Nice, France [Conference Paper]