Publications

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Displaying 1251-1275 of 1700 result(s).

B. Li, P. van der Wolf, K.L.M. Bertels, TTL inter-task communication implementation on a shared memory multiprocessor platform (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]

A.M. Molnos, M.J.M. Heijligers, S.D. Cotofana, J.T.J. van Eijndhoven, Inter-task sharing data and instructions in cache with enabling compositionality in parallel embedded systems (November 2005), 16th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2005), 17-18 November 2005, Veldhoven, The Netherlands [Conference Paper]

C.H. Meenderinck, S.D. Cotofana, Computing Periodic Symmetric Functions in Single Electron Tunneling Technology (October 2005), International Semiconductor Conference (CAS 2005), 3-5 October 2005, Sinaia, Romania , Best Paper Award [Conference Paper]

J.W. van de Waerdt, S. Vassiliadis, J.P. van Itegem, H. van Antwerpen, The TM3270 Media-Processor Data Cache (October 2005), 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, USA [Conference Paper]

J.W. van de Waerdt, J. Hoogerbrugge, Using a cache miss pattern to address a stride prediction table (October 2005), filed in Europe [Patent]

G.K. Kuzmanov, G.N. Gaydadjiev, S. Vassiliadis, The Molen Media Processor: Design and Evaluation (September 2005), International Workshop on Application Specific Processors (WASP 2005), 19-21 September 2005, Jersey City, USA [Conference Paper]

I. Sourdis, S. Vassiliadis, Hashing For IDS Pattern Matching (September 2005), 5th Architectures and Compilers for Embedded Systems Symposium (ACES 2005), 26-27 September 2005, Edegem, Belgium [Conference Paper]

Z. Chang, G.N. Gaydadjiev, S. Vassiliadis, Improvements for MANET Routing Protocols Simulation (September 2005), 5th Architectures and Compilers for Embedded Systems Symposium (ACES 2005), 26-27 September 2005, Edegem, Belgium [Conference Paper]

J. Hoogerbrugge, J.W. van de Waerdt, Counter based stride prediction table data prefetching (September 2005), filed in Europe [Patent]

F. Duarte, S. Wong, Bluetooth protocol profiling on the Xilinx Virtex II Pro (September 2005), 5th Architectures and Compilers for Embedded Systems Symposium (ACES 2005), 26-27 September 2005, Edegem, Belgium [Conference Paper]

C. Strydis, G.N. Gaydadjiev, S. Vassiliadis, A generic digital architecture & compiler for implantable devices (September 2005), 5th Architectures and Compilers for Embedded Systems Symposium (ACES 2005), 26-27 September 2005, Edegem, Belgium [Conference Paper]

L. Mhamdi, S. Vassiliadis, Architecture of High-Speed Switches and Internet Routers (September 2005), 5th Architectures and Compilers for Embedded Systems Symposium (ACES 2005), 26-27 September 2005, Edegem, Belgium [Conference Paper]

L.S. Shuai, Matchmaking functions for resource allocation in dynamic networks (August 2005), [Msc Thesis]

Li Zhang, Threshold Logic Network Synthesis Suite (August 2005), [Msc Thesis]

I. Sourdis, D.N. Pnevmatikatos, S. Wong, S. Vassiliadis, A Reconfigurable Perfect-Hashing Scheme for Packet Inspection (August 2005), 15th International Conference on Field Programmable Logic and Applications (FPL 2005), 24-26 August 2005, Tampere, Finland [Conference Paper]

J.W. van de Waerdt, S. Vassiliadis, E.W. Bellers, J.G.W.M. Janssen, Temporal Video Up-Conversion on a Next-Generation Media-Processor (August 2005), 7th IASTED International Conference on Signal and Image Processing (SIP 2005), 15-17 August 2005, Honolulu, Hawaii, USA [Conference Paper]

S. Hamdioui, Z. Al-Ars, A.J. van de Goor, R. Wadsworth, Impact of Stresses on the Fault Coverage of Memory Tests (August 2005), IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2005), 3-5 August 2005, Taipei, Taiwan [Conference Paper]

Y. Zhao, Benchmarking and Profiling the RSVP Protocol (August 2005), [Msc Thesis]

J.W. van de Waerdt, Memory region based data pre-fetching (August 2005), filed in USA [Patent]

J.W. van de Waerdt, SDRAM address mapping optimized for two-dimensional accesses (August 2005), filed in Europe [Patent]

G.L. Reijns, A.J.C. van Gemund, Predicting the execution times of parallel-independent programs using Pearson distributions (August 2005), Parallel Computing, volume 31, issue 8-9 [Journal Paper]

G.N. Gaydadjiev, S. Vassiliadis, Flux Caches: What Are They and Are They Useful? (July 2005), 5th International Workshop on Computer Systems: Architectures, Modelling, and Simulation (SAMOS 2005), 18-20 July 2005, Samos, Greece [Conference Paper]

C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, Buffer Design Trade-Offs for Single Electron Logic Gates (July 2005), 5th IEEE Conference on Nanotechnology (IEEE-NANO 2005), 11-15 July 2005, Nagoya, Japan , Best Paper Award [Conference Paper]

C.H. Meenderinck, C.R. Lageweg, S.D. Cotofana, Design Methodology for Single Electron Based Building Blocks (July 2005), 5th IEEE Conference on Nanotechnology (IEEE-NANO 2005), 11-15 July 2005, Nagoya, Japan [Conference Paper]

C.H. Meenderinck, Arithmetic Operations in Single Electron Tunneling Technology (July 2005), [Msc Thesis]

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